Efficiency of transient bit-flips detection by software means: a complete study

This-paper characterizes the effectiveness of an error detection technique that addresses transient faults induced by the environment (radiation, EMC) in processor-based architectures. Experimental results obtained from fault injection sessions performed on two platforms built around a 32-bit digital signal processor and an 8-bit microcontroller, provide objective figures about the efficiency of the proposed approach.

[1]  Suku Nair,et al.  Design and Evaluation of System-Level Checks for On-Line Control Flow Error Detection , 1999, IEEE Trans. Parallel Distributed Syst..

[2]  Raoul Velazco,et al.  Injecting bit flip faults by means of a purely software approach: a case studied , 2002, 17th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2002. DFT 2002. Proceedings..

[3]  Jacob A. Abraham,et al.  Algorithm-Based Fault Tolerance for Matrix Operations , 1984, IEEE Transactions on Computers.

[4]  Raoul Velazco,et al.  THESIC: A testbed suitable for the qualification of integrated circuits devoted to operate in harsh environment , 1998 .

[5]  Algirdas Avizienis,et al.  The N-Version Approach to Fault-Tolerant Software , 1985, IEEE Transactions on Software Engineering.

[6]  Massimo Violante,et al.  Hardening the software with respect to transient errors: a method and experimental results , 2000 .

[7]  Marco Torchiano,et al.  Soft-error detection through software fault-tolerance techniques , 1999, Proceedings 1999 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (EFT'99).

[8]  Bogdan Nicolescu,et al.  Detecting Soft Errors by a Purely Software Approach: Method, Tools and Experimental Results , 2003, DATE.

[9]  T. P. Ma,et al.  Ionizing radiation effects in MOS devices and circuits , 1989 .

[10]  Yvon Savaria,et al.  Reducing fault sensitivity of microprocessor-based systems by modifying workload structure , 1998, Proceedings 1998 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Cat. No.98EX223).

[11]  Brian Randell System structure for software fault tolerance , 1975 .

[12]  M. Sonza-Reorda,et al.  A software fault tolerance method for safety-critical systems: effectiveness and drawbacks , 2002, Proceedings. 15th Symposium on Integrated Circuits and Systems Design.

[13]  Stephen S. Yau,et al.  An Approach to Concurrent Control Flow Checking , 1980, IEEE Transactions on Software Engineering.

[14]  E. Normand Single-event effects in avionics , 1996 .

[15]  Brian Randell,et al.  System structure for software fault tolerance , 1975, IEEE Transactions on Software Engineering.