Evaluation of puddle time effect and optimization of development process in 193-nm lithography

The development process is very important in determining the resolution of the lithography process. As the shrinkage of design rule approaches to sub-100nm, understanding of dissolution mechanism and optimization of development process are needed to control the critical dimension (CD) and to obtain the best lithography performance. It was expected that more diluted developer solution could be used and appropriate for the 193nm lithography. But it has a serious issue in terms of changing and handling the concentration of developer solution in a factory, so application of diluted developer solution to lithography process is expected to be difficult. With this problem in mind, we focus on shortening process time during development stage instead of application of diluted solution, which has a demerit in mass production. Process margins of short time process were evaluated and compared with those of normal development process in 193nm lithography. This short time process was proved to be applicable to 193nm lithography and confirmed in view of line edge roughness (LER), in-wafer CD uniformity, mask error enhancement factor (MEEF), a bias between isolated and dense pattern (ID bias) and so on. This also could make it possible to improve the track throughput, which amount of increment may be 24 wafers per hour in 4 development modules.