NESP2: a low power analog neural signal processor with analog weight storage

Analog artificial neural networks (ANN) could be the core of an "intelligent" signal processor, with the today used digital processing replaced by a raw "data driven" methodology. Characteristic of this approach is: analog input/output: signals don't need A/D and D/A converters; speed: an analog system can be faster than a digital or a mixed-mode one; effectiveness: ANN already demonstrated their power in many applications; low power: analog circuits can save power. NESP2 is a neural signal processor which offers the above characteristics and is based on a traditional, available and not expensive double polysilicon double metal commercial VLSI process.

[1]  W S McCulloch,et al.  A logical calculus of the ideas immanent in nervous activity , 1990, The Philosophy of Artificial Intelligence.

[2]  Ching-Yuan Wu,et al.  Physical model for characterizing and simulating a FLOTOX EEPROM device , 1992 .

[3]  Eros Gian Alessandro Pasero,et al.  A System Design Methodology for Analog Feed Forward Artificial Neural Networks , 1999 .

[4]  V. Hu,et al.  EEPROM device as a reconfigurable analog element for neural networks , 1989, International Technical Digest on Electron Devices Meeting.

[5]  R. S. Gyurcsik,et al.  An analog VLSI neural network with on-chip perturbation learning , 1997, IEEE J. Solid State Circuits.

[6]  Ping-Keung Ko,et al.  EEPROM as an analog storage device, with particular applications in neutral networks , 1992 .

[7]  Daniele D. Caviglia,et al.  An experimental analog VLSI neural network with on-chip back-propagation learning , 1992, ESSCIRC '92: Eighteenth European Solid-State Circuits conference.

[8]  J J Hopfield,et al.  Neurons with graded response have collective computational properties like those of two-state neurons. , 1984, Proceedings of the National Academy of Sciences of the United States of America.

[9]  S. Tam,et al.  An electrically trainable artificial neural network (ETANN) with 10240 'floating gate' synapses , 1990, International 1989 Joint Conference on Neural Networks.

[10]  B. Eitan,et al.  Analysis and modeling of floating-gate EEPROM cells , 1986, IEEE Transactions on Electron Devices.

[11]  Kenneth R. Laker,et al.  Design of analog integrated circuits and systems , 1994 .

[12]  Yannis Tsividis,et al.  A reconfigurable VLSI neural network , 1992 .

[13]  W. Pitts,et al.  A Logical Calculus of the Ideas Immanent in Nervous Activity (1943) , 2021, Ideas That Created the Future.

[14]  Eros Pasero,et al.  NESP: an analog NEural Signal Processor , 1995, Proceedings of ISCAS'95 - International Symposium on Circuits and Systems.