Integrated circuit quality optimization using surface integrals

A novel formulation of the parametric yield as a surface integral on the boundary of the disturbance space acceptability region is introduced. This formulation allows the accurate and efficient estimation of yield via a Monte Carlo method which can also produce yield gradients with minimal overhead. The authors extend this formulation to a more general IC quality measure. A general IC quality optimization method, significantly more efficient than Taguchi's, is introduced. This method can handle multiple performances and perform yield maximization as a special case. The optimization method is demonstrated on several circuit examples. >

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