Simplified addressing scheme for mixed radix FFT algorithms

A mixed radix algorithm for the in-place fast Fourier transform (FFT), which is broadly used in most embedded signal processing fields, can be explicitly expressed by an iterative equation based on the Cooley-Tukey algorithm. The expression can be applied to either decimation-in-time (DIT) or decimation-in-frequency (DIF) FFTs with ordered inputs. For many newly emerging low power portable computing applications, such as mobile high definition video compressing, mobile fast and accurate satellite location, etc., the existing methods perform either resource consuming or non-flexible. In this paper, we propose a new addressing scheme for efficiently implementing mixed radix FFTs. In this scheme, we elaborately design an accumulator that can generate accessing addresses for the operands, as well as the twiddle factors. The analytical results show that the proposed scheme reduces the algorithm complexity meanwhile helps the designer to efficiently choose an arbitrary FFT to design the in-place architecture.

[1]  Hang Liu,et al.  A high performance four-parallel 128/64-point radix-24 FFT/IFFT processor for MIMO-OFDM systems , 2008, APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems.

[2]  Jesús Grajal,et al.  Pipelined Radix-$2^{k}$ Feedforward FFT Architectures , 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[3]  An Pan,et al.  Low-cost reconfigurable VLSI architecture for fast fourier transform , 2008, IEEE Transactions on Consumer Electronics.

[4]  Gordon L. DeMuth,et al.  Algorithms for defining mixed radix FFT flow graphs , 1989, IEEE Trans. Acoust. Speech Signal Process..

[5]  S. Prakash,et al.  A new radix-6 FFT algorithm , 1981 .

[6]  Zhang Lisheng,et al.  Design of HighSpeed FFT Processor for Length N=q×2\+m , 2008 .

[7]  Chin-Long Wey,et al.  Efficient memory-based FFT processors for OFDM applications , 2007, 2007 IEEE International Conference on Electro/Information Technology.

[8]  E. Dubois,et al.  A new algorithm for the radix-3 FFT , 1978 .

[9]  Teng Long,et al.  Research on pipeline R2 2 SDF FFT , 2009 .

[10]  Pao-Ann Hsiung,et al.  A low-power 64-point pipeline FFT/IFFT processor for OFDM applications , 2011, IEEE Transactions on Consumer Electronics.

[11]  Oscar Gustafsson,et al.  Unified architecture for 2, 3, 4, 5, and 7-point DFTs based on Winograd Fourier transform algorithm , 2013 .

[12]  Chen-Yi Lee,et al.  A Generalized Mixed-Radix Algorithm for Memory-Based FFT Processors , 2010, IEEE Transactions on Circuits and Systems II: Express Briefs.

[13]  Jarmo Takala,et al.  Conflict-free parallel access scheme for mixed-radix FFT supporting I/O permutations , 2011, 2011 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP).

[14]  U. Jagdhold,et al.  A 64-point Fourier transform chip for high-speed wireless LAN application using OFDM , 2004, IEEE Journal of Solid-State Circuits.

[15]  Daisuke Takahashi.  A new radix-6 FFT algorithm suitable for multiply-add instruction , 2000, 2000 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings (Cat. No.00CH37100).

[16]  Bevan M. Baas,et al.  The design of a reconfigurable continuous-flow mixed-radix FFT processor , 2009, 2009 IEEE International Symposium on Circuits and Systems.

[17]  Myung Hoon Sunwoo,et al.  New continuous-flow mixed-radix (CFMR) FFT Processor using novel in-place strategy , 2005, IEEE Transactions on Circuits and Systems I: Regular Papers.

[18]  Hsi-Chin Hsin,et al.  Low-power and high-speed CORDIC-based split-radix FFT processor for OFDM systems , 2010, Digit. Signal Process..