A High-level and Low Power Consumption Synthesis Scheme and its Implementation

In this paper,a high level synthesis scheme based on multiple voltages scheduling and resource binding is proposed for low power design.In this scheme a simultaneous optimization method of multiple voltages scheduling and resource binding is proposed to optimize power dissipation through optimizing power supply voltage and switching activity under timing constraints.The proposed scheme is characterized with taking the influence of scheduling into consideration of binding in the scheduling process,resulting in more conducive contribution to binding,and further reducing the power consumption.The proposed algorithm is implemented in C environment and is found to have time complexity of O(n2),where n is the number of nodes in the data flow graph.Experiments with three benchmarks indicate that the proposed algorithm achieves the power reduction by an average of 36.6% with high power optimizing index and low timing complexity.