The beat-frequency circuit for monitoring duty-cycle shift based on BTI effect

Circuit reliability issues have great attention to the researchers, especially bias temperature instability (BTI). Obviously, the threshold voltage of the device degraded when the MOS is in the stress mode. For CMOS digital circuits, duty cycle of the signal can shift. In this paper, the beat-frequency circuit design has been verified by the duty-cycle shift of buffer chain. The two ring oscillators (RO) with the same size as the comparison circuit, and the output as the beat frequency to measure the duty-cycle shift, where one is stressed, and the other is unstressed. We found that the duty-cycle increases as the stress time increases. The circuit is demonstrated by using the SMIC 65nm, 1.2V technology.