Efficient Boolean Manipulation With OBDD's can be Extended to FBDD's

OBDD's are the state-of-the-art data structure for Boolean function manipulation. Basic tasks of Boolean manipulation such as equivalence test, satisfiability test, tautology test and single Boolean synthesis steps can be performed efficiently in terms of fixed ordered OBDD's. The bottleneck of most OBDD-applications is the size of the represented Boolean functions since the total computation merely remains tractable as long as the OBDD-representations remain of reasonable size. Since it is well known that OBDD's are restricted FBDD's (free BDD's, i.e., BDD's that test, on each path, each input variable at most once), and that FBDD-representations are often much more (sometimes even exponentially more) concise than OBDD-representations. We propose to work with a more general FBDD-based data structure. We show that FBDD's of a fixed type provide, similar as OBDD's of a fixed variable ordering, canonical representations of Boolean functions, and that basic tasks of Boolean manipulation can be performed in terms of fixed typed FBDD's similarly efficient as in terms of fixed ordered OBDD's. In order to demonstrate the power of the FBDD-concept we show that the verification of the circuit design for the hidden weighted bit function proposed Bryant can be carried out efficiently in terms of FBDD's while this is, for principal reasons, impossible in terms of OBDD's. >

[1]  Sartaj Sahni,et al.  On the Computational Complexity of Scheme Equivalence , 1974 .

[2]  Erik Meineche Schmidt,et al.  The Complexity of Equivalence and Containment for Free Single Variable Program Schemes , 1978, ICALP.

[3]  Sheldon B. Akers,et al.  Binary Decision Diagrams , 1978, IEEE Transactions on Computers.

[4]  Manuel Blum,et al.  Equivalence of Free Boolean Graphs can be Decided Probabilistically in Polynomial Time , 1980, Inf. Process. Lett..

[5]  Randal E. Bryant,et al.  Graph-Based Algorithms for Boolean Function Manipulation , 1986, IEEE Transactions on Computers.

[6]  Masahiro Fujita,et al.  Evaluation and improvement of Boolean comparison method based on binary decision diagrams , 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.

[7]  Christoph Meinel,et al.  Modified Branching Programs and Their Computational Power , 1989, Lecture Notes in Computer Science.

[8]  K. Karplus Using if-then-else DAGs for multi-level logic minimization , 1989 .

[9]  Olivier Coudert,et al.  Verifying Temporal Properties of Sequential Machines without Building Their State Diagrams , 1990, CAV.

[10]  Masahiro Fujita,et al.  Automatic and semi-automatic verification of switch-level circuits with temporal logic and binary decision diagrams , 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

[11]  Kenneth J. Supowit,et al.  Finding the Optimal Variable Ordering for Binary Decision Diagrams , 1990, IEEE Trans. Computers.

[12]  Don E. Ross,et al.  Heuristics to compute variable orderings for efficient manipulation of ordered binary decision diagrams , 1991, 28th ACM/IEEE Design Automation Conference.

[13]  Srinivas Devadas,et al.  Boolean satisfiability and equivalence checking using general binary decision diagrams , 1991, [1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors.

[14]  Randal E. Bryant,et al.  On the Complexity of VLSI Implementations and Graph Representations of Boolean Functions with Application to Integer Multiplication , 1991, IEEE Trans. Computers.

[15]  Nagisa Ishiura,et al.  Shared binary decision diagram with attributed edges for efficient Boolean function manipulation , 1990, 27th ACM/IEEE Design Automation Conference.

[16]  Edmund M. Clarke,et al.  Sequential circuit verification using symbolic model checking , 1991, DAC '90.

[17]  Hans Eveking,et al.  Verifikation digitaler Systeme , 1991 .

[18]  Kurt Keutzer,et al.  Gate-delay-fault testability properties of multiplexor-based networks , 1991, 1991, Proceedings. International Test Conference.

[19]  Randal E. Bryant,et al.  Efficient implementation of a BDD package , 1991, DAC '90.

[20]  Bernd Becker,et al.  Synthesis for Testability: Binary Decision Diagrams , 1992, STACS.

[21]  Jacob A. Abraham,et al.  Efficient Verification Of Multiplier And Other Difficult Functions Using IBDDs , 1992, 1992 Proceedings of the IEEE Custom Integrated Circuits Conference.

[22]  Edmund M. Clarke,et al.  Symbolic Model Checking: 10^20 States and Beyond , 1990, Inf. Comput..

[23]  Randal E. Bryant,et al.  Symbolic Boolean manipulation with ordered binary-decision diagrams , 1992, CSUR.

[24]  Christoph Meinel,et al.  Branching Programs - An Efficient Data Structure for Computer-Aided Circuit Design , 1992, Bull. EATCS.

[25]  Christoph Meinel,et al.  Analysis and Manipulation of Boolean Functions in Terms of Decision Graphs , 1992, WG.

[26]  Christoph Meinel,et al.  Frontiers of Feasible and Probabilistic Feasible Boolean Manipulation with Branching Programs , 1993, STACS.

[27]  Bernd Becker,et al.  A BDD-based algorithm for computation of exact fault detection probabilities , 1993, FTCS-23 The Twenty-Third International Symposium on Fault-Tolerant Computing.

[28]  B. Krieger,et al.  PLATO: A Tool for Computation of Exact Signal Probabilities , 1993, The Sixth International Conference on VLSI Design.

[29]  On the Complexity of Analysis and Manipulation of Boolean Functions in Terms of Decision Graphs , 1994, Inf. Process. Lett..

[30]  Fabio Somenzi,et al.  Extended BDDs: Trading of canonicity for structure in verification algorithms , 1991, Formal Methods Syst. Des..

[31]  Harry B. Hunt,et al.  On the Size of Binary Decision Diagrams Representing Boolean Functions , 1995, Theor. Comput. Sci..

[32]  Ingo Wegener,et al.  Graph Driven BDDs - A New Data Structure for Boolean Functions , 1995, Theor. Comput. Sci..