Thermal-aware task mapping for communication energy minimization on 3D NoC

Three dimensional Network-on-chip (3D NoC) is regarded as an attractive architecture delivering high communication performance. However, due to its high power density and strong vertical thermal correlation, thermal issues in 3D NoC are critical. In this paper, we propose a thermalaware task mapping algorithm (3D-TTM) to reduce peak temperature meanwhile minimize the communication energy consumption. Experimental results show that the proposed scheme can achieve significant peak temperature reduction (up to 5.75K) when compared to other methods. Moreover, our proposed algorithm achieves up to 63.34% communication energy consumption reduction.

[1]  Jun Yang,et al.  Thermal-Aware Task Scheduling for 3D Multicore Processors , 2010, IEEE Transactions on Parallel and Distributed Systems.

[2]  Narayanan Vijaykrishnan,et al.  On-chip Bus Thermal Analysis and Optimization , 2006, Proceedings of the Design Automation & Test in Europe Conference.

[3]  Lei Zhou,et al.  MSP based thermal-aware mapping approach for 3D Network-on-Chip under performance constraints , 2016, IEICE Electron. Express.

[4]  Xiaowei Li,et al.  Thermal-Constrained Task Allocation for Interconnect Energy Reduction in 3-D Homogeneous MPSoCs , 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[5]  Shaahin Hessabi,et al.  Thermal and power aware task mapping on 3D Network on Chip , 2016, Comput. Electr. Eng..

[6]  Gabriel H. Loh,et al.  Thermal Herding: Microarchitecture Techniques for Controlling Hotspots in High-Performance 3D-Integrated Processors , 2007, 2007 IEEE 13th International Symposium on High Performance Computer Architecture.

[7]  Tomonori Sekiguchi,et al.  1-Tbyte/s 1-Gbit DRAM Architecture Using 3-D Interconnect for High-Throughput Computing , 2011, IEEE Journal of Solid-State Circuits.

[8]  Shekhar Y. Borkar.  3D integration for energy efficient system design , 2006, 2009 Symposium on VLSI Technology.

[9]  Li Shang,et al.  Three-Dimensional Chip-Multiprocessor Run-Time Thermal Management , 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[10]  Alois Knoll,et al.  Energy-Aware Task Allocation for Network-on-Chip Based Heterogeneous Multiprocessor Systems , 2011, 2011 19th International Euromicro Conference on Parallel, Distributed and Network-Based Processing.

[11]  Gaizhen Yan,et al.  CTTA : A Cluster-Based Thermal-Aware Task Allocation Algorithm for 3 D NoC , 2022 .