We studied the potential of optical scatterometry to measure the full 3D profile of features representative to real circuit design topology. The features were selected and printed under conditions to improve the measurability of the features by scatterometry without any loss of information content for litho monitoring and control applications. The impact of the scatterometry recipe and settings was evaluated and optimal settings were determined. We have applied this strategy on a variety of structures and gathered results using the YieldStar angular reflection based scatterometer. The reported results show that we obtained effective decoupling of the measurement of the 3 dimensions of the features. The results match with predictions by calibrated lithographic simulations. As a verification we have successfully performed a scanner matching experiment using computational Pattern Matcher (cPM) in combination with YieldStar as a metrology tool to characterize the difference between the scanners and verify the matching. The results thus obtained were better than using CD-SEM for matching and verification.
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