Implementation Aspects of Gbit / s Communication System for 60 GHz Band

— This paper reports some implementation details of a proposed 60 GHz communication system for data rates up to 1 Gbit/s. Based on investigations of the link budget, some important PHY parameters will be derived. Using those PHY parameters, the architecture of a 60 GHz demonstrator is developed. Since the most critical part of the demonstrator is the analog frontend (AFE), some circuit blocks are discussed in detail. Measurement results of an integrated receiver frontend, and a frequency synthesizer are presented.

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