Efficient Loopback Test for Aperture Jitter in Embedded Mixed-Signal Circuits
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[1] R. Puhakka. Cost of Test - Big Driver in ATE , 2006 .
[2] Jacob A. Abraham,et al. Spectral Prediction for Specification-Based Loopback Test of Embedded Mixed-Signal Circuits , 2006, 24th IEEE VLSI Test Symposium.
[3] Hao-Chiao Hong,et al. A Decorrelating Design-for-Digital-Testability Scheme for Sigma-Delta Modulators , 2009, IEEE Trans. Circuits Syst. I Regul. Pap..
[4] Wolfgang Rave,et al. Dirty RF: A New Paradigm , 2005, 2005 IEEE 16th International Symposium on Personal, Indoor and Mobile Radio Communications.
[5] Michael L. Bushnell,et al. An area efficient mixed-signal test architecture for systems-on-a-chip , 2006, 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06).
[6] Jacob A. Abraham,et al. Transformer-Coupled Loopback Test for Differential Mixed-Signal Specifications , 2007, 25th IEEE VLSI Test Symposium (VTS'07).
[7] Gordon W. Roberts,et al. Embedded Measurement of GHz Digital Signals With Time Amplification in CMOS , 2008, IEEE Transactions on Circuits and Systems I: Regular Papers.
[8] I. Duzevik. Design and implementation of IEEE 1149.6 , 2003, International Test Conference, 2003. Proceedings. ITC 2003..
[9] Fabrizio Lombardi,et al. Analysis and measurement of fault coverage in a combined ATE and BIST environment , 2004, IEEE Transactions on Instrumentation and Measurement.
[10] A. Chatterjee,et al. Low-cost test of embedded RF/analog/mixed-signal circuits in SOPs , 2004, IEEE Transactions on Advanced Packaging.
[11] José Silva-Martínez,et al. A 63 dB SNR, 75-mW Bandpass RF $\Sigma\Delta$ ADC at 950 MHz Using 3.8-GHz Clock in 0.25-$\mu{\hbox {m}}$ SiGe BiCMOS Technology , 2007, IEEE Journal of Solid-State Circuits.
[12] Edgar Sánchez-Sinencio,et al. An On-Chip Loopback Block for RF Transceiver Built-In Test , 2009, IEEE Transactions on Circuits and Systems II: Express Briefs.
[13] Jerker Delsing,et al. Level-Crossing ADC Performance Evaluation Toward Ultrasound Application , 2009, IEEE Transactions on Circuits and Systems I: Regular Papers.
[14] Yang Xu,et al. Quadrature Sampling for Built-In Analog/RF IC Spectrum Test , 2010, IEEE Transactions on Circuits and Systems II: Express Briefs.
[15] Sergio Callegari,et al. Complex Oscillation-Based Test and Its Application to Analog Filters , 2010, IEEE Transactions on Circuits and Systems I: Regular Papers.
[16] Patrick Satarzadeh,et al. Adaptive Semiblind Calibration of Bandwidth Mismatch for Two-Channel Time-Interleaved ADCs , 2009, IEEE Transactions on Circuits and Systems I: Regular Papers.
[17] S. Mollenkopf. Aperture jitter in IF sampling CDMA receivers , 1997, 1997 IEEE MTT-S Symposium on Technologies for Wireless Applications Digest.
[18] Y. Akazawa,et al. Jitter analysis of high-speed sampling systems , 1990 .
[19] Walt Kester,et al. The data conversion handbook , 2005 .
[20] Giovanni Chiorboli. Sub-picosecond aperture uncertainty measurements , 2001, IMTC 2001. Proceedings of the 18th IEEE Instrumentation and Measurement Technology Conference. Rediscovering Measurement in the Age of Informatics (Cat. No.01CH 37188).
[21] A. Chatterjee,et al. Novel Cross-Loopback Based Test Approach for Specification Test of Multi-Band, Multi-Hardware Radios , 2007, 25th IEEE VLSI Test Symposium (VTS'07).
[22] Giovanni Chiorboli. Sub-picosecond aperture-uncertainty measurements [ADCs] , 2002, IEEE Trans. Instrum. Meas..
[23] Juha Kostamovaara,et al. Combining the Standard Histogram Method and a Stimulus Identification Algorithm for A/D Converter INL Testing With a Low-Quality Sine Wave Stimulus , 2010, IEEE Transactions on Circuits and Systems I: Regular Papers.
[24] Jacob A. Abraham,et al. Predicting mixed-signal dynamic performance using optimised signature-based alternate test , 2007, IET Comput. Digit. Tech..
[25] Gerhard Fettweis,et al. The effects of aperture jitter and clock jitter in wideband ADCs , 2007, Comput. Stand. Interfaces.
[26] Luigi Carro,et al. An Improved RF Loopback for Test Time Reduction , 2006, Proceedings of the Design Automation & Test in Europe Conference.
[27] Hans G. Kerkhoff,et al. Off-Chip Diagnosis of Aperture Jitter in Full-Flash Analog-to-Digital Converters , 1999, J. Electron. Test..
[28] Pierluigi Nuzzo,et al. Noise Analysis of Regenerative Comparators for Reconfigurable ADC Architectures , 2008, IEEE Transactions on Circuits and Systems I: Regular Papers.
[29] Jacob A. Abraham,et al. Optimized Signature-Based Statistical Alternate Test for Mixed-Signal Performance Parameters , 2006, Eleventh IEEE European Test Symposium (ETS'06).
[30] Alfio Zanchi,et al. Measurement and SPICE prediction of sub-picosecond clock jitter in A/D converters , 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..
[31] S. S. Saad,et al. The effects of accumulated timing jitter on some sine wave measurements , 1995 .
[32] Kcstcr. The Data Conversion Handbook , 2007 .
[33] Miquel Roca,et al. Verifying Functional Specifications by Regression Techniques on Lissajous Test Signatures , 2009, IEEE Transactions on Circuits and Systems I: Regular Papers.
[34] Edgar Sánchez-Sinencio,et al. A Current Injection Built-In Test Technique for RF Low-Noise Amplifiers , 2008, IEEE Transactions on Circuits and Systems I: Regular Papers.
[35] Jan Van der Spiegel,et al. Background Calibration With Piecewise Linearized Error Model for CMOS Pipeline A/D Converter , 2008, IEEE Transactions on Circuits and Systems I: Regular Papers.
[36] Jacques Durand,et al. An improved method of ADC jitter measurement , 1994, Proceedings., International Test Conference.
[37] I. Duzevik. Design and implementation of IEEE 1149.6 , 2003, International Test Conference, 2003. Proceedings. ITC 2003..
[38] Abhijit Chatterjee,et al. A high-resolution jitter measurement technique using ADC sampling , 2001, Proceedings International Test Conference 2001 (Cat. No.01CH37260).
[39] Daniel Bloyet,et al. Measurement of timing jitter contributions in a dynamic test setup for A/D converters , 2001, IEEE Trans. Instrum. Meas..
[40] Gordon W. Roberts,et al. An Introduction to Mixed-Signal IC Test and Measurement , 2000 .
[41] Yiorgos Tsiatouhas,et al. A Built-In-Test Circuit for RF Differential Low Noise Amplifiers , 2010, IEEE Transactions on Circuits and Systems I: Regular Papers.
[42] Jeongjin Roh,et al. Efficient loop-back testing of on-chip ADCs and DACs , 2003, ASP-DAC '03.
[43] Carlo Samori,et al. Analysis and Characterization of the Effects of Clock Jitter in A/D Converters for Subsampling , 2008, IEEE Transactions on Circuits and Systems I: Regular Papers.