An embedded 90 nm SONOS nonvolatile memory utilizing hot electron programming and uniform tunnel erase
暂无分享,去创建一个
C.T. Swift | A. Hoefler | G.L. Chindalore | K. Harber | T.S. Harp | C.M. Hong | P.A. Ingersoll | C.B. Li | E.J. Prinz | J.A. Yater | E. Prinz | C. Swift | G. Chindalore | A. Hoefler | T. Harp | J. Yater | K. Harber | C. Hong | P. Ingersoll | C.B. Li
[1] S. Minami,et al. A novel MONOS nonvolatile memory device ensuring 10-year data retention after 10/sup 7/ erase/write cycles , 1993 .
[2] P. Abramowitz,et al. A 100 nm copper/low-k bulk CMOS technology with multi Vt and multi gate oxide integrated transistors for low standby power, high performance and RF/analog system on chip applications , 2002, 2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303).
[3] T. Chan,et al. A true single-transistor oxide-nitride-oxide EEPROM device , 1987, IEEE Electron Device Letters.
[4] Chih-Yuan Lu,et al. Cause of data retention loss in a nitride-based localized trapping storage flash memory cell , 2002, 2002 IEEE International Reliability Physics Symposium. Proceedings. 40th Annual (Cat. No.02CH37320).
[5] D. Reber,et al. A high density 0.10 /spl mu/m CMOS technology using low K dielectric and copper interconnect , 2001, International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224).
[6] B. Eitan,et al. NROM: A novel localized trapping, 2-bit nonvolatile memory cell , 2000, IEEE Electron Device Letters.