An Efficient Algorithm for Online Soft Real-Time Task Placement on Reconfigurable Hardware Devices

Reconfigurable devices such as field programmable gate arrays (FPGAs) are very popular in today's embedded systems (design due to their low-cost, high-performance and flexibility. Partially runtime-reconfigurable (PRTR) FPGAs allow hardware tasks to be placed and removed dynamically at runtime. Hardware task scheduling on PRTR FPGAs brings many challenging issues to traditional real-time scheduling theory, which have not been adequately addressed by the real-time research community compared to software task scheduling on CPUs. In this paper, we present an efficient online task placement algorithm for minimizing fragmentation on PRTR FPGAs. First, we present a novel 2D area fragmentation metric that takes into account probability distribution of sizes of future task arrivals; second, we take into the time axis to obtain a 3D fragmentation metric. Simulation experiments indicate that our techniques result in low ratio of task rejection and high FPGA utilization compared to existing techniques

[1]  Zonghua Gu,et al.  An Efficient Algorithm for Online Management of 2D Area of Partially Reconfigurable FPGAs , 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.

[2]  Zonghua Gu,et al.  Optimal Static Task Scheduling on Reconfigurable Hardware Devices Using Model-Checking , 2007, 13th IEEE Real Time and Embedded Technology and Applications Symposium (RTAS'07).

[3]  Ranga Vemuri,et al.  An efficient algorithm for finding empty space for online FPGA placement , 2004, Proceedings. 41st Design Automation Conference, 2004..

[4]  Hee Yong Youn,et al.  An Efficient Task Allocation Scheme for 2D Mesh Architectures , 1997, IEEE Trans. Parallel Distributed Syst..

[5]  Marco Platzner,et al.  Online scheduling and placement of real-time tasks to partially reconfigurable devices , 2003, RTSS 2003. 24th IEEE Real-Time Systems Symposium, 2003.

[6]  Ranga Vemuri,et al.  An Integrated Online Scheduling and Placement Methodology , 2004, FPL.

[7]  Zonghua Gu,et al.  Hardware/Software Partitioning and Static Task Scheduling on Runtime Reconfigurable FPGAs using a SMT Solver , 2008, 2008 IEEE Real-Time and Embedded Technology and Applications Symposium.

[8]  Hortensia Mecha,et al.  Task placement heuristics based on 3D-adjacency and look-ahead in reconfigurable systems , 2006, Asia and South Pacific Conference on Design Automation, 2006..

[9]  Ge Yu,et al.  Improved Schedulability Analysis of EDF Scheduling on Reconfigurable Hardware Devices , 2007, 2007 IEEE International Parallel and Distributed Processing Symposium.

[10]  Ranga Vemuri,et al.  Area Fragmentation in Reconfigurable Operating Systems , 2004, ERSA.

[11]  Hortensia Mecha,et al.  A Low Fragmentation Heuristic for Task Placement in 2D RTR HW Management , 2004, FPL.

[12]  Jiri Sgall,et al.  On-line scheduling --- a survey , 1997 .