Programmable and adaptive analog filters using arrays of floating-gate circuits

In this paper we describe a programmable and adaptive filter based on floating-gate technology We review the basics of floating-gate techniques and how they enable programmable and adaptive filter circuits. We describe our programmable filter concepts, and show experimental results of programmable filter operation. We also describe programming methods, and extend the programmability to a wide range of functions and circuits using the same approach. Further, we describe our techniques and custom programmer board for floating-gate programming of an IC. We show how to extend our programmable filters as adaptive filters both through weight perturbation methods and continuously adapting correlation rule methods.

[1]  S. Kung,et al.  VLSI Array processors , 1985, IEEE ASSP Magazine.

[2]  Richard F. Lyon,et al.  An analog electronic cochlea , 1988, IEEE Trans. Acoust. Speech Signal Process..

[3]  Carver Mead,et al.  Analog VLSI and neural systems , 1989 .

[4]  Marwan A. Jabri,et al.  Weight perturbation: an optimal architecture and learning technique for analog VLSI feedforward and recurrent multilayer networks , 1992, IEEE Trans. Neural Networks.

[5]  Anders Krogh,et al.  Introduction to the theory of neural computation , 1994, The advanced book program.

[6]  Gert Cauwenberghs,et al.  A Fast Stochastic Error-Descent Algorithm for Supervised Learning and Optimization , 1992, NIPS.

[7]  Richard F. Lyon,et al.  Improved implementation of the silicon cochlea , 1992 .

[8]  Peter M. Clarkson,et al.  Optimal and Adaptive Signal Processing , 1993 .

[9]  Paul E. Hasler,et al.  Single Transistor Learning Synapses , 1994, NIPS.

[10]  Gert Cauwenberghs,et al.  Analog VLSI Stochastic Perturbative Learning Architectures , 1997 .

[11]  Paul Hasler,et al.  An autozeroing floating-gate second-order section , 1998, ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187).

[12]  Paul Hasler,et al.  A four-quadrant floating-gate synapse , 1998, ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187).

[13]  Paul E. Hasler,et al.  Adaptive circuits using pFET floating-gate devices , 1999, Proceedings 20th Anniversary Conference on Advanced Research in VLSI.

[14]  Paul E. Hasler,et al.  Floating-gate devices: they are not just for digital memories any more , 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

[15]  Paul Hasler,et al.  Cadence-based simulation of floating-gate circuits using the EKV model , 1999, 42nd Midwest Symposium on Circuits and Systems (Cat. No.99CH36356).

[16]  Paul Hasler,et al.  A transistor-only circuit model of the autozeroing floating-gate amplifier , 1999, 42nd Midwest Symposium on Circuits and Systems (Cat. No.99CH36356).

[17]  Paul E. Hasler,et al.  Correlation learning rule in floating-gate pFET synapses , 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

[18]  Paul Hasler Continuous-time feedback in floating-gate MOS circuits , 2001 .

[19]  Reid R. Harrison,et al.  A CMOS programmable analog memory-cell array using floating-gate circuits , 2001 .

[20]  Paul Hasler,et al.  A programmable continuous-time floating-gate Fourier processor , 2001 .

[21]  Paul Hasler,et al.  An Autozeroing Floating-Gate Amplifier , 2001 .