A novel spatio-temporal adaptive bus encoding for reducing crosstalk interferences with trade-offs between performance and reliability

Due to advanced process technologies the decreasing distance between wires has led to significant bus interferences that introduce crosstalk delay and noise. We first propose two encoding schemes, namely DUCE and GASIE, that can reduce crosstalk delay and noise on the bus lines. The DUCE scheme is a temporal encoding so it needs no additional bits to implement. It can be easily used in existing systems without additional modification in the hardware architecture. For improving performance, we propose a spatial encoding scheme called GASIE which has shielding lines protection and additional bits for transmitting control signals. Compared to existing spatial encoding methods, GASIE not only does not need any profiling information, but also achieves better results. Finally, we combine DUCE and GASIE into a novel spatio-temporal adaptive encoding (STAE) to tradeoff between performance and reliability. The experimental results for various applications showed significant reductions in the number of patterns that were most likely to produce crosstalk delay and errors. The two adjacent transitions and the aggressors can be completely eliminated in the DUCE scheme. While the GASIE scheme can achieve up to 59.9% average reduction of two aggressors, the STAE scheme gives a strongly error tolerant environment of 70% reduction in aggressors and adjacent transitions at the cost of 10% performance loss.

[1]  Taewhan Kim Low Power Bus Encoding with Crosstalk Delay Elimination , 2002 .

[2]  Luca Benini,et al.  Low power error resilient encoding for on-chip data buses , 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

[3]  Kurt Keutzer,et al.  Bus encoding to prevent crosstalk delay , 2001, IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers (Cat. No.01CH37281).

[4]  Meeyoung Cha,et al.  Resource-constrained low-power bus encoding with crosstalk delay elimination , 2004 .

[5]  Alex Orailoglu,et al.  A unified transformational approach for reductions in fault vulnerability, power, and crosstalk noise & delay on processor buses , 2005, ASP-DAC.

[6]  Chun-Gi Lyuh,et al.  Low power bus encoding with crosstalk delay elimination [SoC] , 2002, 15th Annual IEEE International ASIC/SOC Conference.

[7]  Qinru Qiu,et al.  Partitioned bus coding for energy reduction , 2005, Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005..

[8]  Michael J. Flynn Area - Time - Power and Design effort: the basic tradeoffs in Application Specific Systems , 2005, ASAP.

[9]  David Blaauw,et al.  Leakage-and crosstalk-aware bus encoding for total power reduction , 2004, Proceedings. 41st Design Automation Conference, 2004..

[10]  Tughrul Arslan,et al.  A novel bus encoding scheme from energy and crosstalk efficiency perspective for AMBA based generic SoC systems , 2005, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design.

[11]  Mircea R. Stan,et al.  Bus-invert coding for low-power I/O , 1995, IEEE Trans. Very Large Scale Integr. Syst..

[12]  Massoud Pedram,et al.  Transition reduction in memory buses using sector-based encoding techniques , 2004, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[13]  A. Orailoglu,et al.  A unified transformational approach for reductions in fault vulnerability, power, and crosstalk noise and delay on processor buses , 2005, Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005..

[14]  Kevin J. Nowka,et al.  Dynamically pulsed MTCMOS with bus encoding for total power and crosstalk minimization , 2005, Sixth international symposium on quality electronic design (isqed'05).