Reconfigurable Cluster-Based Networks-on-Chip for Application-Specific MPSoCs
暂无分享,去创建一个
[1] Todd M. Austin,et al. Polymorphic On-Chip Networks , 2008, 2008 International Symposium on Computer Architecture.
[2] Stamatis Vassiliadis,et al. Reconfigurable FLUX networks , 2006, 2006 IEEE International Conference on Field Programmable Technology.
[3] Srinivasan Murali,et al. Bandwidth-constrained mapping of cores onto NoC architectures , 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.
[4] Andrew B. Kahng,et al. ORION 2.0: A fast and accurate NoC power and area model for early-stage design space exploration , 2009, 2009 Design, Automation & Test in Europe Conference & Exhibition.
[5] Vipin Kumar,et al. A Fast and High Quality Multilevel Scheme for Partitioning Irregular Graphs , 1998, SIAM J. Sci. Comput..
[6] Marcus Thomas Schmitz. Energy minimisation techniques for distributed embedded systems , 2003 .
[7] Radu Marculescu,et al. Application-specific buffer space allocation for networks-on-chip router design , 2004, ICCAD 2004.
[8] Hamid Sarbazi-Azad,et al. Application-Aware Topology Reconfiguration for On-Chip Networks , 2011, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[9] Hoi-Jun Yoo,et al. Low-power network-on-chip for high-performance SoC design , 2006, IEEE Trans. Very Large Scale Integr. Syst..
[10] Zeljko Zilic,et al. A Hybrid Ring/Mesh Interconnect for Network-on-Chip Using Hierarchical Rings for Global Routing , 2007, First International Symposium on Networks-on-Chip (NOCS'07).
[11] William J. Dally,et al. Design tradeoffs for tiled CMP on-chip networks , 2006, ICS '06.
[12] Hamid Sarbazi-Azad,et al. Virtual Point-to-Point Connections for NoCs , 2010, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.