A new frequency comparator for using in fast charge pump PLLs

A bang-bang frequency comparator (BBFC) can be used in the feedthrough path in pump phase locked loops (CPPLL) to increase the locking speed. In this paper, we present a new structure which can be used as a BBFC and then show how this frequency comparator can decrease the settling time in a charge pump PLL. Simulations in Advanced Design System (ADS2008) using TSMC RF CMOS 0.18um confirm that applying the suggested BBFC can increase the locking speed significantly.

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