Towards biologically realistic multi-compartment neuron model emulation in analog VLSI

We present a new concept for multi-compartment emulation on neuromorphic hardware based on the BrainScaleS wafer-scale system. The implementation features complex dendrite routing capabilities, real- istic scaling of compartmental parameters and active spike propagation. Simulations proof the circuit's capability of reproducing passive dendritic properties of a model from literature.

[1]  David P. M. Northmore,et al.  Building silicon nervous systems with dendritic tree neuromorphs , 1999 .

[2]  Johannes Schemmel,et al.  A VLSI Implementation of the Adaptive Exponential Integrate-and-Fire Neuron Model , 2010, NIPS.

[3]  Yingxue Wang,et al.  Multilayer Processing of Spatiotemporal Spike Patterns in a Neuron with Active Dendrites , 2010, Neural Computation.

[4]  Johannes Schemmel,et al.  Realizing biological spiking network models in a configurable wafer-scale hardware system , 2008, 2008 IEEE International Joint Conference on Neural Networks (IEEE World Congress on Computational Intelligence).

[5]  Wulfram Gerstner,et al.  SPIKING NEURON MODELS Single Neurons , Populations , Plasticity , 2002 .

[6]  Wulfram Gerstner,et al.  Adaptive exponential integrate-and-fire model as an effective description of neuronal activity. , 2005, Journal of neurophysiology.

[7]  Johannes Schemmel,et al.  Wafer-scale integration of analog neural networks , 2008, 2008 IEEE International Joint Conference on Neural Networks (IEEE World Congress on Computational Intelligence).

[8]  Gert Cauwenberghs,et al.  Neuromorphic Silicon Neuron Circuits , 2011, Front. Neurosci.

[9]  Vivien A. Casagrande,et al.  Biophysics of Computation: Information Processing in Single Neurons , 1999 .

[10]  Henry Markram,et al.  Models of Neocortical Layer 5b Pyramidal Cells Capturing a Wide Range of Dendritic and Perisomatic Active Properties , 2011, PLoS Comput. Biol..

[11]  A. Destexhe,et al.  Dendritic Low-Threshold Calcium Currents in Thalamic Relay Cells , 1998, The Journal of Neuroscience.

[12]  Stephan Henker,et al.  A 32 GBit/s communication SoC for a waferscale neuromorphic system , 2012, Integr..

[13]  J.V. Arthur,et al.  Recurrently connected silicon neurons with active dendrites for one-shot learning , 2004 .

[14]  Örjan Ekeberg,et al.  A computer based model for realistic simulations of neural networks , 1991, Biological Cybernetics.

[15]  Christof Koch,et al.  The role of single neurons in information processing , 2000, Nature Neuroscience.

[16]  Johannes Schemmel,et al.  A wafer-scale neuromorphic hardware system for large-scale neural modeling , 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

[17]  Arindam Basu,et al.  Transistor channel dendrites implementing HMM classifiers , 2007, 2007 IEEE International Symposium on Circuits and Systems.

[18]  Rodney J. Douglas,et al.  Forward- and backpropagation in a silicon dendrite , 2001, IEEE Trans. Neural Networks.

[19]  W. Rall Cable theory for dendritic neurons , 1989 .