Implementation of 1024-point FFT Algorithm Based on Cyclone FPGA

This paper describes an implementation of 1024-point FFT algorithm using Decimation in Frequency(DIF) radix 2 structure based on the low-cost FPGA of Altera(Cyclone serials).The system designed by Verilog HDL is simulated,synthesized by EDA tools and verified with the development board.At last,the performance of the whole system is analyzed.Experimental results show that the high speed of FFT can be realized by low-cost FPGA.