Drain current enhancement due to velocity overshoot effects and its analytic modeling

The drain current enhancement due to the velocity overshoot effects is found to be due to the electron velocity enhancement at the source end. Based on this observation, a new analytic model is proposed and verified by two-dimensional (2-D) simulations and experiments. From the results of the verifications, we conclude that our model predicts the drain current enhancement due to the velocity overshoot effects reasonably well. The effects of the device parameters, such as gate oxide thickness and channel doping concentration, on the drain current enhancement ran be readily found in our model.

[1]  E. Sangiorgi,et al.  Silicon MOS transconductance scaling into the overshoot regime , 1993, IEEE Electron Device Letters.

[2]  P. J. Price On the flow equation in device simulation , 1988 .

[3]  D. Kern,et al.  High transconductance and velocity overshoot in NMOS devices at the 0.1- mu m gate-length level , 1988, IEEE Electron Device Letters.

[4]  A. Toriumi,et al.  Hot-carrier effects in 0.1 mu m gate length CMOS devices , 1992, 1992 International Technical Digest on Electron Devices Meeting.

[5]  T. Kobayashi,et al.  Two-dimensional analysis of velocity overshoot effects in ultrashort-channel Si MOSFET's , 1985, IEEE Transactions on Electron Devices.

[6]  C.G. Sodini,et al.  The effect of high fields on MOS device and circuit performance , 1984, IEEE Transactions on Electron Devices.

[7]  Yuan Taur,et al.  High performance 0.1 /spl mu/m CMOS devices with 1.5 V power supply , 1993, Proceedings of IEEE International Electron Devices Meeting.

[8]  T. Tang,et al.  An Analytical Device Model Including Velocity Overshoot for Subquartermicrometer MOSFET , 1993 .

[9]  Mitiko Miura-Mattausch,et al.  Analytical MOSFET model for quarter micron technologies , 1994, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[10]  R.W. Dutton,et al.  Simulation of deep submicron SOI N-MOSFET considering the velocity overshoot effect , 1995, IEEE Electron Device Letters.

[11]  Young-June Park,et al.  A time dependent hydrodynamic device simulator SNU-2D with new discretization scheme and algorithm , 1994, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[12]  H.I. Smith,et al.  Electron velocity overshoot at room and liquid nitrogen temperatures in silicon inversion layers , 1988, IEEE Electron Device Letters.

[13]  Shinichi Takagi,et al.  On the universality of inversion-layer mobility in n- and p-channel MOSFETs , 1988, Technical Digest., International Electron Devices Meeting.

[14]  Kenji Taniguchi,et al.  Analytical device model for submicrometer MOSFET's , 1991 .

[15]  H.I. Smith,et al.  Observation of electron velocity overshoot in sub-100-nm-channel MOSFET's in Silicon , 1985, IEEE Electron Device Letters.

[16]  C. Hu,et al.  Threshold voltage model for deep-submicrometer MOSFETs , 1993 .