On-die source-pull for the characterization of the W-band noise performance of 65 nm general purpose (GP) and low power (LP) n-MOSFETs

A low-loss source-pull tuner network consisting of transmission lines and CMOS switches is integrated on the same chip with a W-band LNA in 65nm RF CMOS technology, allowing for the accurate characterization of the optimal noise impedance of n-MOSFETs in the W-band. In a separate experiment, a W-band downconverter is integrated along with GP and LP transistors to resolve the difference in noise figures of GP and LP MOSFETs fabricated on the same die. These measurements show that, in the same technology node, GP n-MOSFETs exhibit 1dB lower NF50 than LP devices. Experimental evidence is provided for the first time that the optimum noise figure current density depends linearly on the lateral electric field in the channel, but invariant between GP and LP transistors. Based on the characterized MOSFET noise parameters, GP CMOS LNAs with 6dB and 7dB noise figures were designed and tested at 75–85 GHz and at 80–100 GHz, respectively. These LNAs exhibit 2–3 dB lower noise figure than an equivalent CMOS LNA fabricated in a 65nm RF LP CMOS process.