Parallel implementation of BDD algorithms using a distributed shared memory

Binary Decision Diagrams (BDDs) are used extensively in VLSI CAD for verification, synthesis, logic minimization and testing. Parallel algorithms for Boolean Function Manipulation using BDDs have been proposed and implemented on a Connection Machine (CM-5). Abstractions have been developed to support the design of these algorithms using the message passing model of parallel programming. A Distributed Shared Memory (DSM) has been built for sharing date. Fine grained load balancing is achieved using a Distributed Stack. Experimental results are shown for the DSM and the BDD algorithms. These results demonstrate the feasibility of using parallel computing for irregular and memory intensive CAD applications such as the BDD algorithms. Improvements to the current implementation are identified for future work.<<ETX>>

[1]  Bill Nitzberg,et al.  Distributed shared memory: a survey of issues and algorithms , 1991, Computer.

[2]  Randal E. Bryant,et al.  Test Pattern Generation for Sequential MOS Circuits by Symbolic Fault Simulation , 1989, 26th ACM/IEEE Design Automation Conference.

[3]  James R. Larus,et al.  The Wisconsin Wind Tunnel: virtual prototyping of parallel computers , 1993, SIGMETRICS '93.

[4]  Umakishore Ramachandran,et al.  An implementation of distributed shared memory , 1991, Softw. Pract. Exp..

[5]  Sheldon B. Akers,et al.  Binary Decision Diagrams , 1978, IEEE Transactions on Computers.

[6]  Randal E. Bryant,et al.  Efficient implementation of a BDD package , 1991, DAC '90.

[7]  Nagisa Ishiura,et al.  Shared binary decision diagram with attributed edges for efficient Boolean function manipulation , 1990, 27th ACM/IEEE Design Automation Conference.

[8]  Paul Hudak,et al.  Memory coherence in shared virtual memory systems , 1986, PODC '86.

[9]  David H. C. Du,et al.  Performance evaluation of the CM-5 interconnection network , 1993, Digest of Papers. Compcon Spring.

[10]  F. Brglez,et al.  A neutral netlist of 10 combinational benchmark circuits and a target translator in FORTRAN , 1985 .

[11]  Randal E. Bryant,et al.  Graph-Based Algorithms for Boolean Function Manipulation , 1986, IEEE Transactions on Computers.

[12]  Harry Berryman,et al.  Performance of Hashed Cache Data Migration Schemes on Multicomputers , 1991, J. Parallel Distributed Comput..

[13]  Michael Stumm,et al.  Algorithms implementing distributed shared memory , 1990, Computer.

[14]  F. Brglez,et al.  A neutral netlists of 10 combinational circuits and a target translator in FORTRAN , 1985 .

[15]  Henri E. Bal,et al.  A comparison of two paradigms for distributed shared memory , 1992, Softw. Pract. Exp..

[16]  Seth Copen Goldstein,et al.  Active messages: a mechanism for integrating communication and computation , 1998, ISCA '98.

[17]  C. Y. Lee.  Representation of switching circuits by binary-decision programs , 1959 .

[18]  Albert R. Wang,et al.  Logic verification using binary decision diagrams in a logic synthesis environment , 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.