Projected Don't Cares
暂无分享,去创建一个
[1] B. Ye. Rytsar. A new approach to the decomposition of boolean functions. 4. non-disjoint decomposition: the method of p, q-partitions , 2009 .
[2] Fabio Somenzi,et al. Logic synthesis and verification algorithms , 1996 .
[3] Tsutomu Sasao,et al. A New Expansion of Symmetric Functions and Their Application to Non-Disjoint Functional Decompositions for LUT Type FPGAs , 2000 .
[4] Roberto Cordone,et al. On Projecting Sums of Products , 2008, 2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools.
[5] Tiziano Villa,et al. On decomposing Boolean functions via extended cofactoring , 2009, 2009 Design, Automation & Test in Europe Conference & Exhibition.
[6] Stephen Dean Brown,et al. Functionally Linear Decomposition and Synthesis of Logic Circuits for FPGAs , 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[7] Jordi Cortadella. Timing-driven logic bi-decomposition , 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[8] Masahiro Fujita,et al. Multi-level logic optimization , 2001 .
[9] R. Rudell,et al. Multiple-Valued Logic Minimization for PLA Synthesis , 1986 .
[10] Randal E. Bryant,et al. Graph-Based Algorithms for Boolean Function Manipulation , 1986, IEEE Transactions on Computers.
[11] Ming Zhang,et al. Combinational Logic Soft Error Correction , 2006, 2006 IEEE International Test Conference.
[12] Maciej J. Ciesielski,et al. BDS: a BDD-based logic optimization system , 2000, DAC.
[13] Nur A. Touba,et al. Partial error masking to reduce soft error failure rate in logic circuits , 2003, Proceedings 18th IEEE Symposium on Defect and Fault Tolerance in VLSI Systems.
[14] Feng Shi,et al. Coping with Soft Errors in Asynchronous Burst-Mode Machines , 2008, 2008 14th IEEE International Symposium on Asynchronous Circuits and Systems.
[15] Tsutomu Sasao,et al. Switching Theory for Logic Synthesis , 1999, Springer US.
[16] Tiziano Villa,et al. Complexity of two-level logic minimization , 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[17] E BryantRandal. Graph-Based Algorithms for Boolean Function Manipulation , 1986 .
[18] Fabrizio Luccio,et al. On a New Boolean Function with Applications , 1999, IEEE Trans. Computers.
[19] Sandeep K. Gupta,et al. Approximate logic synthesis for error tolerant applications , 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).
[20] S. Yang,et al. Logic Synthesis and Optimization Benchmarks User Guide Version 3.0 , 1991 .