High-speed FPGA-based implementations of a Genetic Algorithm
暂无分享,去创建一个
[1] Russell Tessier,et al. Power-aware RAM mapping for FPGA embedded memory blocks , 2006, FPGA '06.
[2] John R. Koza,et al. Evolving computer programs using rapidly reconfigurable field-programmable gate arrays and genetic programming , 1998, FPGA '98.
[3] Gurwant Kaur Koonar. IMPLEMENTATION OF GENETIC ALGORITHMS FOR VLSI CAD DESIGN , 2003 .
[4] Y. R. Tsoy,et al. The influence of population size and search time limit on genetic algorithm , 2003, 7th Korea-Russia International Symposium on Science and Technology, Proceedings KORUS 2003. (IEEE Cat. No.03EX737).
[5] Ashok Samal,et al. HGA: A Hardware-Based Genetic Algorithm , 1995, Third International ACM Symposium on Field-Programmable Gate Arrays.
[6] Moritoshi Yasunaga,et al. Online Evolution for a High-Speed Image Recognition System Implemented On a Virtex-II Pro FPGA , 2007, Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007).
[7] Ioannis Papaefstathiou,et al. Implementation of a genetic algorithm on a virtex-ii pro FPGA , 2009, FPGA '09.
[8] Shawki Areibi,et al. Hardware Implementation of Genetic Algorithms for VLSI Design , 2002, CAINE.
[9] Keiichi Yasumoto,et al. General Architecture for Hardware Implementation of Genetic Algorithm , 2006, 2006 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines.
[10] David E. Goldberg,et al. Genetic Algorithms in Search Optimization and Machine Learning , 1988 .
[11] Peter Martin,et al. A Hardware Implementation of a Genetic Programming System Using FPGAs and Handel-C , 2001, Genetic Programming and Evolvable Machines.