Design of Ultra-Wideband Low-Noise Amplifiers in 45-nm CMOS Technology: Comparison Between Planar Bulk and SOI FinFET Devices

This paper deals with the design of single-stage differential low-noise amplifiers for ultra-wideband (UWB) applications, comparing state-of-the-art planar bulk and silicon-on-insulator (SOI) FinFET CMOS technologies featuring 45-nm gate length. To ensure a broadband input impedance matching, the g m-boosted topology has been chosen. Furthermore, the amplifiers have been designed to work over the whole UWB band (3.1-10.6 GHz), while driving a capacitive load, which is a realistic assumption for direct conversion receivers where the amplifier directly drives a mixer. The simulations (based on compact models obtained from preliminary measurements) highlight that, at the present stage of the technology development, the planar version of the circuit appears to outperform the FinFET one. The main reason is the superior cutoff frequency of planar devices in the inversion region, which allows the achievement of noise figure and voltage gain comparable to the FinFET counterpart, with a smaller power consumption.

[1]  Dimitri Linten,et al.  The Potential of FinFETs for Analog and RF Circuit Applications , 2007, IEEE Transactions on Circuits and Systems I: Regular Papers.

[2]  Mourad N. El-Gamal,et al.  Design Techniques of CMOS Ultra-Wide-Band Amplifiers for Multistandard Communications , 2008, IEEE Transactions on Circuits and Systems II: Express Briefs.

[3]  G. Knoblinger,et al.  Evaluation of FinFET RF Building Blocks , 2007, 2007 IEEE International SOI Conference.

[4]  Arthur Nieuwoudt,et al.  Numerical Design Optimization Methodology for Wideband and Multi-Band Inductively Degenerated Cascode CMOS Low Noise Amplifiers , 2009, IEEE Transactions on Circuits and Systems I: Regular Papers.

[5]  J.-P. Raskin,et al.  High-Frequency Noise Performance of 60-nm Gate-Length FinFETs , 2008, IEEE Transactions on Electron Devices.

[6]  Thomas H. Lee,et al.  The Design of CMOS Radio-Frequency Integrated Circuits: RF CIRCUITS THROUGH THE AGES , 2003 .

[7]  Shen-Iuan Liu,et al.  An Ultra-Wide-Band 0.4–10-GHz LNA in 0.18-$\mu$m CMOS , 2007, IEEE Transactions on Circuits and Systems II: Express Briefs.

[8]  B. Razavi,et al.  A UWB CMOS transceiver , 2005, IEEE Journal of Solid-State Circuits.

[9]  Shen-Iuan Liu,et al.  A Broadband Noise-Canceling CMOS LNA for 3.1–10.6-GHz UWB Receivers , 2007, IEEE Journal of Solid-State Circuits.

[10]  M. Tiebout,et al.  LNA design for a fully integrated CMOS single chip UMTS transceiver , 2002, Proceedings of the 28th European Solid-State Circuits Conference.

[11]  A. Mercha,et al.  Planar Bulk MOSFETs Versus FinFETs: An Analog/RF Perspective , 2006, IEEE Transactions on Electron Devices.

[12]  Ahmed Amer,et al.  A Low-Power Wideband CMOS LNA for WiMAX , 2007, IEEE Transactions on Circuits and Systems II: Express Briefs.

[13]  F. Svelto,et al.  A variable gain RF front-end, based on a Voltage-Voltage feedback LNA, for multistandard applications , 2005, IEEE Journal of Solid-State Circuits.

[14]  A. Abidi,et al.  Large suspended inductors on silicon and their use in a 2- mu m CMOS RF amplifier , 1993, IEEE Electron Device Letters.

[15]  B. Nauta,et al.  Wideband Balun-LNA With Simultaneous Output Balancing, Noise-Canceling and Distortion-Canceling , 2008, IEEE Journal of Solid-State Circuits.

[16]  R.W. Brodersen,et al.  Design of a Sub-mW 960-MHz UWB CMOS LNA , 2006, IEEE Journal of Solid-State Circuits.

[17]  Wouter A. Serdijn,et al.  A UWB CMOS 0.13μm low-noise amplifier with dual loop negative feedback , 2008, 2008 IEEE International Symposium on Circuits and Systems.

[18]  M. Tiebout,et al.  A WiMedia/MBOA-Compliant CMOS RF Transceiver for UWB , 2006, 2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers.

[19]  Francesco Svelto,et al.  A 0.18-μm CMOS selective receiver front-end for UWB applications , 2006 .

[21]  Andrea Bevilacqua,et al.  Design of broadband inductorless LNAs in ultra-scaled CMOS technologies , 2008, 2008 IEEE International Symposium on Circuits and Systems.

[22]  Oliver Chiu-sing Choy,et al.  A Fully Differential Band-Selective Low-Noise Amplifier for MB-OFDM UWB Receivers , 2008, IEEE Transactions on Circuits and Systems II: Express Briefs.

[23]  M. Tiebout,et al.  ESD-protected CMOS 3-5 GHz wideband LNA+PGA design for UWB , 2005, Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005..

[24]  Rita Rooyackers,et al.  Multi-gate devices for the 32 nm technology node and beyond , 2008 .

[25]  Antonio Liscidini,et al.  A 0.13 /spl mu/m CMOS front-end, for DCS1800/UMTS/802.11b-g with multiband positive feedback low-noise amplifier , 2006, IEEE Journal of Solid-State Circuits.

[26]  S. Hu,et al.  An Accurate Scalable Compact Model for the Substrate Resistance of RF MOSFETs , 2007, 2007 IEEE Custom Integrated Circuits Conference.

[27]  E. Sanchez-Sinencio,et al.  Using capacitive cross-coupling technique in RF low noise amplifiers and down-conversion mixer design , 2000, Proceedings of the 26th European Solid-State Circuits Conference.

[28]  Gerhard Knoblinger Multi-Gate MOSFET Design , 2006, 2006 Proceedings of the 32nd European Solid-State Circuits Conference.

[29]  Qiang Li,et al.  An Inductorless Low-Noise Amplifier with Noise Cancellation for UWB Receiver Front-End , 2006, 2006 IEEE Asian Solid-State Circuits Conference.

[30]  D. Allstot,et al.  A CMOS 3.1-10.6 GHz UWB LNA employing stagger-compensated series peaking , 2006, IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006.

[31]  D.J. Allstot,et al.  Design considerations for CMOS low-noise amplifiers , 2004, 2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers.

[32]  H. Tigelaar,et al.  Ni-based FUSI gates: CMOS Integration for 45nm node and beyond , 2006, 2006 International Electron Devices Meeting.

[33]  Minjae Lee,et al.  An 800-MHz–6-GHz Software-Defined Wireless Receiver in 90-nm CMOS , 2006, IEEE Journal of Solid-State Circuits.

[34]  T. Lee,et al.  A 1.5 V, 1.5 GHz CMOS low noise amplifier , 1996 .

[35]  Yang Lu,et al.  A novel CMOS low-noise amplifier design for 3.1- to 10.6-GHz ultra-wide-band wireless receivers , 2006, IEEE Transactions on Circuits and Systems I: Regular Papers.

[36]  D.J. Allstot,et al.  Bandwidth Extension Techniques for CMOS Amplifiers , 2006, IEEE Journal of Solid-State Circuits.

[37]  B. Parvais,et al.  Analysis of the FinFET parasitics for improved RF performances , 2007, 2007 IEEE International SOI Conference.

[38]  Luca Selmi,et al.  Design of UWB LNA in 45nm CMOS technology: Planar bulk vs. FinFET , 2008, 2008 IEEE International Symposium on Circuits and Systems.

[39]  F. Svelto,et al.  A 0.18-$muhbox m$CMOS Selective Receiver Front-End for UWB Applications , 2006, IEEE Journal of Solid-State Circuits.

[40]  B. Nauta,et al.  Wide-band CMOS low-noise amplifier exploiting thermal noise canceling , 2004, IEEE Journal of Solid-State Circuits.

[41]  B. Parvais,et al.  Stochastic Matching Properties of FinFETs , 2006, IEEE Electron Device Letters.

[42]  A. Bevilacqua,et al.  An ultra-wideband CMOS LNA for 3.1 to 10.6 GHz wireless receivers , 2004, 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519).

[43]  S. Iida,et al.  A 3.1 to 5 GHz CMOS DSSS UWB transceiver for WPANs , 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

[44]  Zhihua Wang,et al.  Bandwidth extension for ultra-wideband CMOS low-noise amplifiers , 2008, 2008 IEEE International Symposium on Circuits and Systems.

[45]  A. Scarpa,et al.  Strategies to cope with plasma charging damage in design and layout phases , 2005, 2005 International Conference on Integrated Circuit Design and Technology, 2005. ICICDT 2005..

[46]  Igor M. Filanovsky,et al.  A CMOS 2.0–11.2 GHz UWB LNA using active inductor circuit , 2008, 2008 IEEE International Symposium on Circuits and Systems.

[47]  J. Bokor,et al.  FinFET-a quasi-planar double-gate MOSFET , 2001, 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177).

[48]  R. Rooyackers,et al.  Multi-gate devices for the 32nm technology node and beyond , 2007, ESSDERC 2007 - 37th European Solid State Device Research Conference.