0.13μm CMOS technologies for analog front-end circuits in LHC detector upgrades

Deep submicron CMOS technologies are widely used for the implementation of low noise front-end electronics in various detector applications. In this field the designers’ effort is presently focused on 0.13μm technologies. This work presents the results of noise measurements carried out on CMOS devices in a 0.13 μm commercial process. The study also includes an evaluation of the impact of high doses of ionizing radiation on the noise performances. Data obtained from the measurements provide a powerful tool to model noise parameters and establish design criteria in a 0.13 μm CMOS process for detector front-ends in LHC upgrades.

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