A 12.5Gb/s/link non-contact multi drop bus system with impedance-matched transmission line couplers and Dicode partial-response channel transceivers

A reduced-reflection multi-drop bus system using Dicode (1-D) partial response signaling transceiver is presented for the first time in the world. Directional couplers on transmission lines arranged with equi-energy distributing and exact impedance matched conditions allow the bus to reach to 12.5Gbps/link speed. The transmission line has 5-convex portions to form one side of a coupler where the transmission line width is adjusted to control the characteristic impedance of the coupling section, minimizing signal reflection from each section. Dicode partial-response signaling method with a half-rate architecture was used where a precoder is placed in the transmitter to make the signal best fit for the channel to eliminate inter symbol interference (ISI) where the test chip transmitter occupies 3,750 μm2 and the receiver occupies 750 μm2 with 90nm CMOS technology, consuming 40mA and 23mA respectively at the supply voltage of 1.2V.

[1]  Shinya Nakano,et al.  A 12-Gb/s Non-Contact Interface With Coupled Transmission Lines , 2013, IEEE Journal of Solid-State Circuits.

[2]  Masum Hossain,et al.  Multi-Gb/s Bit-by-Bit Receiver Architectures for 1-D Partial-Response Channels , 2010, IEEE Transactions on Circuits and Systems I: Regular Papers.

[3]  Kuroda Tadahiro,et al.  A 12Gb/s Non-Contact Interface with Coupled Transmission Lines , 2011 .

[4]  R. Amirtharajah,et al.  A 1.6Gb/s/pair electromagnetically coupled multidrop bus using modulated signaling , 2003, 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC..

[5]  Ting Wu,et al.  A Tri-Modal 20-Gbps/Link Differential/DDR3/GDDR5 Memory Interface , 2012, IEEE Journal of Solid-State Circuits.

[6]  Ashok V. Krishnamoorthy,et al.  Challenges in building a flat-bandwidth memory hierarchy for a large-scale computer with proximity communication , 2005, 13th Symposium on High Performance Interconnects (HOTI'05).

[7]  Shinya Nakano,et al.  A 7Gb/s/link non-contact memory module for multi-drop bus system using energy-equipartitioned coupled transmission line , 2012, 2012 IEEE International Solid-State Circuits Conference.