A wide range low power CMOS radio frequency ring oscillator

This paper presents a wide frequency range, low power dissipation CMOS voltage controlled ring oscillator based on three-stage differential current-steering amplifiers (CSA) cell. The frequency of oscillator has a highly linear relationship with voltage. The VCO circuit realized through 0.18µm CMOS process parameter shows wide operating frequency from 1.624GHz to 3.229 GHz. The simulation result shows that power dissipation is 1mW with 1.8V power supply voltage.

[1]  Leonard Forbes,et al.  Phase noise on a 2-GHz CMOS LC oscillator , 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[2]  B. Razavi,et al.  A UWB CMOS transceiver , 2005, IEEE Journal of Solid-State Circuits.

[3]  E. Seevinck,et al.  A versatile CMOS linear transconductor/square-law function , 1987 .

[4]  Mohammed Ismail,et al.  Low-Voltage CMOS Rail-to-Rail V-I Converters , 1997 .

[5]  Behzad Razavi.  RF CMOS transceivers for cellular telephony , 2003, IEEE Commun. Mag..

[6]  Edgar Sánchez-Sinencio,et al.  A Low-Power Frequency Synthesizer with Quadrature Signal Generation for 2.4 GHz Zigbee Transceiver Applications , 2007, 2007 IEEE International Symposium on Circuits and Systems.

[7]  Charles G. Sodini,et al.  A 200 MHz CMOS phase-locked loop with dual phase detectors , 1989, IEEE International Solid-State Circuits Conference, 1989 ISSCC. Digest of Technical Papers.

[8]  Aad Sempel,et al.  TAM 6.3: A Fully-I ntegrated HIFI PLL FM-Demodulator , 1990 .

[9]  Shu-Chuan Huang,et al.  Design of low-voltage linear tunable CMOS V-I converters with a rail-to-rail input range , 1996, 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96.

[10]  R. F. Wassenaar,et al.  A CMOS rail-to-rail linear VI-converter , 1995, Proceedings of ISCAS'95 - International Symposium on Circuits and Systems.

[11]  Saurabh Sinha.  Design of an integrated CMOS PLL frequency synthesizer , 2002, 11th IEEE Mediterranean Electrotechnical Conference (IEEE Cat. No.02CH37379).

[12]  Mohammed Ismail,et al.  A 1.2 V micropower CMOS class-AB V-I converter for VLSI cells library design , 1998, 1998 Midwest Symposium on Circuits and Systems (Cat. No. 98CB36268).

[13]  H. C. Yang,et al.  A low jitter 0.3-165 MHz CMOS PLL frequency synthesizer for 3 V/5 V operation , 1997 .

[14]  David J. Allstot,et al.  A substrate-referenced data-conversion architecture , 1991 .

[15]  András Timár,et al.  Comprehensive design of a high frequency PLL synthesizer for ZigBee application , 2006, 2006 IEEE Design and Diagnostics of Electronic Circuits and systems.

[16]  Ábel Vámos.  Quadrature-Phase Topology of a High Frequency Ring Oscillator , 2007, 2007 IEEE Design and Diagnostics of Electronic Circuits and Systems.

[17]  Kyutae Lim,et al.  A ring VCO with wide and linear tuning characteristics for a cognitive radio system , 2008, 2008 IEEE Radio Frequency Integrated Circuits Symposium.

[18]  H.C. Luong,et al.  A 1-V 9.7-mW CMOS Frequency Synthesizer for IEEE 802.11a Transceivers , 2008, IEEE Transactions on Microwave Theory and Techniques.

[19]  Oscal T.-C. Chen,et al.  A power-efficient wide-range phase-locked loop , 2002, IEEE J. Solid State Circuits.

[20]  S. Gierkink,et al.  A coupled sawtooth oscillator combining low jitter and high control linearity , 1998, Proceedings of the 24th European Solid-State Circuits Conference.

[21]  S. Pellerano,et al.  A 13.5-mW 5-GHz frequency synthesizer with dynamic-logic frequency divider , 2004, IEEE Journal of Solid-State Circuits.

[22]  E. L. Hudson,et al.  A variable delay line PLL for CPU-coprocessor synchronization , 1988 .