CTL the language for describing core-based test

As part of an industry wide effort the IEEE is in the process of standardizing the elements of test technology such that plug & play can be achieved when testing SoC designs. This standard under development is a language namely, Core Test Language (CTL), which is introduced in this paper. CTL describes all necessary information for test pattern reuse and the needs of test during system integration. CTL syntax and its link to STIL are explained with examples.

[1]  Yervant Zorian,et al.  Towards a standard for embedded core test: an example , 1999, International Test Conference 1999. Proceedings (IEEE Cat. No.99CH37034).

[2]  Erik Jan Marinissen,et al.  A structured and scalable mechanism for test access to embedded reusable cores , 1998, Proceedings International Test Conference 1998 (IEEE Cat. No.98CH36270).

[3]  Rodham E. Tulloss,et al.  The Test Access Port and Boundary Scan Architecture , 1990 .

[4]  Yervant Zorian,et al.  On using IEEE P1500 SECT for test plug-n-play , 2000, Proceedings International Test Conference 2000 (IEEE Cat. No.00CH37159).

[5]  Pierre Bricaud,et al.  Reuse methodology manual for system-on-chip designs , 1998 .

[6]  M. Lousberg,et al.  The role of test protocols in testing embedded-core-based system ICs , 1999, European Test Workshop 1999 (Cat. No.PR00390).