A Dynamic IP Lookup Architecture using Parallel Multiple Hash in GPU-based Software Router
暂无分享,去创建一个
[1] Gaogang Xie,et al. Offset addressing approach to memory-efficient IP address lookup , 2011, 2011 Proceedings IEEE INFOCOM.
[2] Yakov Rekhter,et al. An Architecture for IP Address Allocation with CIDR , 1993, RFC.
[3] George Varghese,et al. Multiway range trees: scalable IP lookup with fast updates , 2001, GLOBECOM'01. IEEE Global Telecommunications Conference (Cat. No.01CH37270).
[4] Yangdong Deng,et al. IP routing processing with graphic processors , 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).
[5] George Varghese,et al. Multiway range trees: scalable IP lookup with fast updates , 2004, Comput. Networks.
[6] Xin Wang,et al. Exploiting graphics processors for high-performance IP lookup in software routers , 2011, 2011 Proceedings IEEE INFOCOM.
[7] Gang Wang,et al. A Fast and Power Efficient Updating Algorithm for Partitioned TCAMs , 2011 .
[8] Gang Wang,et al. Towards Dynamic and Scalable High-Speed IP Address Lookup Based on B+ Tree , 2012, IEICE Trans. Inf. Syst..
[9] Sangjin Han,et al. PacketShader: a GPU-accelerated software router , 2010, SIGCOMM '10.
[10] Wei-Ming Lin,et al. Adaptive Hashing for IP Address Lookup in Computer Networks , 2006, 2006 14th IEEE International Conference on Networks.
[11] Jonathan S. Turner,et al. ClassBench: A Packet Classification Benchmark , 2005, IEEE/ACM Transactions on Networking.