Design and Simulation of Sigma-Delta Fractional-N Frequency Synthesizer for WiMAX

This paper presents a design and simulation of proposed frequency synthesizer which can be used for WiMAX. Design parameters for the proposed fractional-N PLL synthesizer for WiMAX system are either selected from WiMAX standards or according to results of analysis for each unit of the proposed system. Different techniques for phase noise reduction are discussed. Sigma-delta fractional-N technique is chosen for WiMAX system, since low settling time, spurious level and phase noise can be obtained by using this technique. The simulation result shows the system is stable, since the phase margin is greater than 45 degree. The settling time, spurious level and phase noise obtained with this synthesizer are 5.9μs, -90dBc/Hz, and -100dBc/Hz respectively. CppSim program (C++ simulator language) and Matlab (V.7) are used for simulation of Σ∆ fractional-N PLL synthesizer.

[1]  Keliu Shu,et al.  Sinencio CMOS PLL Synthesizers : Analysis and Design , 2006 .

[2]  Andrey M. Turlikov,et al.  WIRELESS BROADBAND ACCESS: WIMAX AND BEYOND - Investigation of Bandwidth Request Mechanisms under Point-to-Multipoint Mode of WiMAX Networks , 2007, IEEE Communications Magazine.

[3]  M.H. Perrott,et al.  A 1-MHZ bandwidth 3.6-GHz 0.18-/spl mu/m CMOS fractional-N synthesizer utilizing a hybrid PFD/DAC structure for reduced broadband phase noise , 2006, IEEE Journal of Solid-State Circuits.

[4]  A.V. Raisanen,et al.  Radio engineering for wireless communication and sensor applications - Book Review , 2003, IEEE Electrical Insulation Magazine.

[5]  Eby G. Friedman,et al.  Design and simulation of Fractional-N PLL frequency synthesizers , 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

[6]  Sudhakar Pamarti,et al.  Phase-noise cancellation design tradeoffs in delta-sigma fractional-N PLLs , 2003, IEEE Trans. Circuits Syst. II Express Briefs.

[7]  WiMAX ’ s technology for LOS and NLOS environments , 2004 .

[8]  Kiyoshi Itoh,et al.  Performance Simulation and Design of Petri Net Systems , 2008, Trans. SDPS.

[9]  M.H. Perrott,et al.  Bandwidth extension of low noise fractional-N synthesizers , 2005, 2005 IEEE Radio Frequency integrated Circuits (RFIC) Symposium - Digest of Papers.

[10]  Scott E. Meninger,et al.  A fractional- N frequency synthesizer architecture utilizing a mismatch compensated PFD/DAC structure for reduced quantization-induced phase noise , 2003 .