Implementing true random number generators by generating crosstalk effects in FPGA chips

This paper presents an original method for creating TRNGs in Xilinx FPGAs. The design is based on agglomerating active logic in a given region of the FPGA chip, either globally or locally. No timing constraints were used in this design. A series of experiments conducted on different architectural variants lead to the conclusion that mapping logic blocks around the dedicated carry chain lines creates intense crosstalk phenomena. The paper demonstrates the possibility of creating high quality TRNGs based on this entropy source. The resulting TRNG provides high quality random numbers (all major statistical test batteries are passed). Depending on the users' requirements, it is possible to connect many units of this generator in parallel on a single FPGA, thus increasing the bit generation throughput up to the Gbps level.