Self-aligned double patterning process for sub-15nm nanoimprint template fabrication

Nanoimprint lithography (NIL) is a promising technology on next generation lithography for the fabrication of semiconductor devices. NIL is a one-to-one lithographic technology with a contact transfer methodology using templates. Therefore, critical dimension (CD) error and defect performance of templates has direct impact on wafer performance. The previous paper reported that the self-aligned double patterning (SADP) process on master template had better performance on resolution and defect performance [2]. In proceeding with development of SADP template process technology, we found that CD errors occurred in the area with a pattern density change. CD control over any pattern density is one of the critical issues. In this report, we have investigated the impact of the proximity effect correction (PEC) and fogging effect correction (FEC) parameters for electron beam writing on gap space and core space. It was found that the optimal PEC parameter for resist CD is not the best for the core space and the gap space. The resist CD is uniform, but there is a difference in resist shape on the local pattern density variation. It was also found that the core space had dependency on global pattern density even if the optimal FEC parameter for resist CD was applied. FEC can correct resist CD, but it cannot adjust resist shape. By using the optimal PEC and FEC parameters for SADP process, the gap space range of 0.6 nm and the core space range of 0.5 nm were successfully obtained.

[1]  T. Higashiki,et al.  Half pitch 14 nm direct pattering with Nanoimprint lithography , 2018, 2018 IEEE International Electron Devices Meeting (IEDM).