VC Merging Project Supporting QoS Control Potentially

Discussed MPLS signaling protocols, methods of mapping IP routing information into ATM labels,and architectures of VC merge capable ATM LSR were discussed. The composing of the output-buffered module and the working process were expatiated. The output buffered module that is capable of implementing VC merging function in output buffered architecture was analyzed deeply. In view of actual intention, the demand to capacity of the extra buffers resulting from VC merging is not large in cell level; VC merging can obtain larger flexibility than the non VC merging can in packet level. The project can provide potential supporting to QoS control by implementing part merging.