On the Aspects of MPSoCs Security: Avoiding Logical Attacks with Network-on-Chip

Logical Side Channel Attacks (SCAs) became a relevant threat for Multi-Processors System-on-Chips (MPSoCs). They are able to extract remotely, sensitive information from the timing behaviour of the MPSoC. Previous works have proposed MPSoCs architectures capable of mitigating some of the SCAs which arise from sharing memory and processor resources. In this work, we discuss the actual logical attacks and countermeasures, and we sustain that the NoC can play the main role in MPSoC security through the proposal of AEGIS NoC. AEGIS NoC was able to harden the protection against several known SCAs through the integration of two main strategies: i) Blinding; and ii) Masking. AEGIS security and performance was evaluated under state-of-the-art attacks on real hardware at FPGA. Results demonstrate the potential to explore the NoC as the central defense mechanism of complex systems.