Precharge write driver

The write driver for improving the operation speed comprises a data input circuit (3) for buffering inverted and non-inverted input data (DIN) to data lines (DL,DLB). A pulse generator (6) detects data transitions and generates a write pulse (WN) which allows the buffered data to succeed to data lines (DL,DLB) via a transmission circuit (7). In response to the inverted write enable signal (WEB), the pulse generator (6) generates a second control pulse (WP) causing a precharge circuit (8) to charge the data lines (DL,DLB) prior to reading. Generation of the precharge pulse (WP) on the fall of the write enable signal allows a more rapid transition from write to read.