Phase Noise Model for an Array of Combined Sources Using Direct Digital Synthesis (DDS)

Abstract : A direct digital synthesizer (DDS) offers the fastest frequency jumping and the finest frequency tuning resolution of any technology available today in a completely controlled digital environment. In this work, we present and experimentally verify a concise DDS phase noise model which includes the possibility of combining the outputs of an array of N parallel DDSs for improved total phase noise performance. The DDS phase noise, LDDS, consists of contributions from the DDS source clock LCk, the internal DDS flicker noise L1/f , and the DDS's digital-to-analog converter (DAC) noise floor LFloor, according to the following equation: L(DDS) = 1/2(r2).O(Ck) + 1/N (r(2)/r(R).L(1/f) + 1/N K(r).L(Floor). Here, r is the ratio of the DDS output frequency to its source clock frequency, and r(R) is the ratio of a particular reference output frequency to the source clock frequency. Though partial versions of this model exist in the literature, the above equation provides a more concise and usable description of DDS-array phase noise than those previously offered. We made measurements on a set of up to eight parallel DDSs to experimentally examine and validate the various relationships of the model. To verify the DDS source clock phase noise contributions, we corrupted a low-noise clock with amplified broadband noise so that the clock noise dominated L(DDS). We validated the contribution from the naturally dominant flicker noise by comparing it to measurements made at a reference output frequency, verifying the expected frequency scaling. We found the floor noise to be negligible at the offset frequencies measured, up to several megahertz. Combining multiple DDSs yielded phase noise improvements in flicker noise contribution, but, as predicted, it had no effect when the phase noise was dominated by the clock contribution.