Evidence of surface states for 4H-SiC MESFETs on semi-insulating substrates by current transient spectroscopy

Conductance DLTS measurements performed on 4H-SiC MESFETs shows "hole-like" traps peaks. These levels are associated with surface states. The conductance measurements are interpreted using a model previously developed for GaAs MESFETs which involves the presence of an interface conducting layer between the channel and the passivating layer (SiC/SiO/sub 2/ in our case).