On the Potentials of FinFETs for Asynchronous Circuit Design

Double-gate Fin FETs have proved to be an appropriate substitute for bulk CMOS when technology scales beyond 32nm. We have designed four novel Finest-based asynchronous basic elements, static C-elements, which differ in front gate and back gate connections. They were compared to a traditional C-element with bulk transistors and a low power version of bulk C-element with the use of sleep. To evaluate our C-gates, a dual rail Muller pipeline has been designed with each kind and compared to two versions of bulk MOSFETs Muller pipeline.

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