A 0.5V signal-specific continuous-time level-crossing ADC with charge sharing

This paper presents a novel continuous-time level- crossing analog-to-digital converter (LC-ADC) targeted at biomedical signal sensing applications. The conventional digital- to-analog converter (DAC) is replaced by a charge sharing block, leading to lower power consumption, less design complexity and more flexibility for various resolution applications. Designed to be implemented in 90 nm CMOS technology, the proposed ADC achieves a maximum SNDR of 51.4dB and consumes a minimum power of 538nW from a dual supply of 0.5V and 0.7V. I. INTRODUCTION Analog-to-digital converters are indispensable building blocks of wearable and implantable biomedical data acquisition systems. Conventional ADCs utilize uniform sampling, which is based on periodically sampling the magnitude of the signal. Among those ADC structures, the successive approximation register (SAR) ADC is the most popular one in low power applications, because the only analog circuitry within it is a comparator, while the rest of the circuits are digital and thus easily scale down with technology. Basically, SAR-ADCs periodically sample the input and use binary search algorithms to successively approximate the sampled input signal from the most-significant bit (MSB) to the least-significant bit (LSB). However, SAR-ADCs are not that power-efficient for biomedical signal recording, as most of the signal components have small signal magnitudes, while the SAR-ADC repeats the same searching procedure from MSB to LSB for each input sample even when the input signal varies slowly.