CMOL: Second life for silicon

This is a brief review of the recent work on the prospective hybrid CMOS/nanowire/nanodevice (''CMOL'') circuits including digital memories, reconfigurable Boolean-logic circuits, and mixed-signal neuromorphic networks. The basic idea of CMOL circuits is to combine the advantages of CMOS technology (including its flexibility and high fabrication yield) with the extremely high potential density of molecular-scale two-terminal nanodevices. Relatively large critical dimensions of CMOS components and the ''bottom-up'' approach to nanodevice fabrication may keep CMOL fabrication costs at affordable level. At the same time, the density of active devices in CMOL circuits may be as high as 10^1^2cm^2 and that they may provide an unparalleled information processing performance, up to 10^2^0 operations per cm^2 per second, at manageable power consumption.

[1]  Anatoli Korkin,et al.  Nano and Giga Challenges in Microelectronics , 2003 .

[2]  André DeHon,et al.  Design of programmable interconnect for sublithographic programmable logic arrays , 2005, FPGA '05.

[3]  C. M. Sotomayor Torres,et al.  Nanoimprint lithography: challenges and prospects , 2001 .

[4]  Jonas I. Goldsmith,et al.  Coulomb blockade and the Kondo effect in single-atom transistors , 2002, Nature.

[5]  K. L. Jensen,et al.  Field emitter arrays for plasma and microwave source applications , 1999 .

[6]  Vaughn Betz,et al.  Architecture and CAD for Deep-Submicron FPGAS , 1999, The Springer International Series in Engineering and Computer Science.

[7]  Andreas Mayr,et al.  CrossNets: High‐Performance Neuromorphic Architectures for CMOL Circuits , 2003, Annals of the New York Academy of Sciences.

[8]  S. Folling,et al.  Single-electron latching switches as nanoscale synapses , 2001, IJCNN'01. International Joint Conference on Neural Networks. Proceedings (Cat. No.01CH37222).

[9]  V. V. Kislov,et al.  Molecular clusters as building blocks for nanoelectronics: the first demonstration of a cluster single-electron tunnelling transistor at room temperature , 2002 .

[10]  D. Strukov,et al.  CMOL FPGA: a reconfigurable architecture for hybrid digital circuits with two-terminal nanodevices , 2005 .

[11]  D. Strukov,et al.  Prospects for terabit-scale nanoelectronic memories , 2004 .

[12]  Jung Hoon Lee,et al.  In Situ Training of CMOL CrossNets , 2006, The 2006 IEEE International Joint Conference on Neural Network Proceedings.

[13]  Zhenan Bao,et al.  Conductance of small molecular junctions. , 2002, Physical review letters.

[14]  Mark A. Ratner,et al.  Introducing molecular electronics , 2002 .

[15]  André DeHon,et al.  Hybrid CMOS/nanoelectronic digital circuits: devices, architectures, and design automation , 2005, ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005..

[16]  Xiaofan Luo,et al.  Molecular Electronics , 2009 .

[17]  Zhenan Bao,et al.  Structure and bonding issues at the interface between gold and self-assembled conjugated dithiol monolayers. , 2005, Langmuir : the ACS journal of surfaces and colloids.

[18]  S.R.J. Brueck,et al.  There are no fundamental limits to optical nanolithography , 2004, The 17th Annual Meeting of the IEEELasers and Electro-Optics Society, 2004. LEOS 2004..

[19]  Jung Hoon Lee,et al.  CMOL CrossNets as Pattern Classifiers , 2005, IWANN.

[20]  Vaughn Betz,et al.  VPR: A new packing, placement and routing tool for FPGA research , 1997, FPL.

[21]  Jean-Luc Brédas,et al.  Single-electron transistor of a single organic molecule with access to several redox states , 2003, Nature.

[22]  Arthur H. Guenther.  International Trends in Applied Optics , 2002 .

[23]  Mahmoud Ahmadian,et al.  Design and evaluation of basic standard encryption algorithm modules using nanosized complementary metal–oxide–semiconductor–molecular circuits , 2006 .

[24]  Konstantin K. Likharev,et al.  Neuromorphic architectures for nanoelectronic circuits: Research Articles , 2004 .

[25]  D. Strukov,et al.  Defect-tolerant architectures for nanoelectronic crossbar memories. , 2007, Journal of nanoscience and nanotechnology.

[26]  Yuan Taur,et al.  Device scaling limits of Si MOSFETs and their application dependencies , 2001, Proc. IEEE.

[27]  R. Palmer,et al.  Introduction to the theory of neural computation , 1994, The advanced book program.

[28]  Dmitri B. Strukov,et al.  A reconfigurable architecture for hybrid CMOS/Nanodevice circuits , 2006, FPGA '06.

[29]  Hylke B. Akkerman,et al.  Towards molecular electronics with large-area molecular junctions , 2006, Nature.

[30]  D. Strukov,et al.  CMOL: Devices, Circuits, and Architectures , 2006 .

[31]  Jan M. Rabaey,et al.  Digital Integrated Circuits: A Design Perspective , 1995 .

[32]  Konstantin K. Likharev,et al.  Electronics Below 10 nm , 2003 .

[33]  D. Strukov,et al.  Afterlife for silicon: CMOL circuit architectures , 2005, 5th IEEE Conference on Nanotechnology, 2005..

[34]  Wei Zheng,et al.  Fabrication and characterization of single‐electron transistors and traps , 1994 .

[35]  Mark A. Ratner,et al.  Molecular electronics , 2005 .

[36]  Paul L. McEuen,et al.  Nanomechanical oscillations in a single-C60 transistor , 2000, Nature.

[37]  K. Richter,et al.  Introducing Molecular Electronics , 2005 .

[38]  Seth Copen Goldstein,et al.  Molecular electronics: from devices and interconnect to circuits and architecture , 2003, Proc. IEEE.

[39]  Konstantin K. Likharev,et al.  Neuromorphic architectures for nanoelectronic circuits , 2004, Int. J. Circuit Theory Appl..

[40]  P. R. Stephan,et al.  SIS : A System for Sequential Circuit Synthesis , 1992 .

[41]  Dmitri B. Strukov,et al.  Defect-Tolerant CMOL Memories , 2006 .

[42]  D. Stewart,et al.  The crossbar latch: Logic value storage, restoration, and inversion in crossbar circuits , 2005 .