A Scalable Heterogeneous Multi-Processor Signal Processing System Based on the RapidIO Interconnect
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[1] J. Tulodziecki. The application of parallel DSP architectures to radar signal processing , 1995 .
[2] J. A. Caruso. The challenge of the increased use of COTS: a developer's perspective , 1995, Proceedings of Third Workshop on Parallel and Distributed Real-Time Systems.
[3] Zhiwei Xu,et al. Scalable parallel computers for real-time signal processing , 1996, IEEE Signal Process. Mag..
[4] T. Boggess,et al. High-performance scalable computing for real-time applications , 1997, Proceedings of Sixth International Conference on Computer Communications and Networks.
[5] Bin Cong,et al. Scalable Parallel Computing: Technology, Architecture, Programming , 1999, Scalable Comput. Pract. Exp..
[6] Hugh Garraway. Parallel Computer Architecture: A Hardware/Software Approach , 1999, IEEE Concurrency.
[7] S. Rejto,et al. Radar open systems architecture and applications , 2000, Record of the IEEE 2000 International Radar Conference [Cat. No. 00CH37037].
[8] Ieee Aerospace,et al. The Record of the IEEE 2000 International Radar Conference , 2000, Record of the IEEE 2000 International Radar Conference [Cat. No. 00CH37037].