Schedulability Analysis for Real Time On-Chip Communication with Wormhole Switching

In this paper, the authors discuss a real-time on-chip communication service with a priority-based wormhole switching policy. The authors present a novel off-line schedulability analysis approach, worst case network latency analysis. By evaluating diverse inter-relationships and service attributes among the traffic flows, this approach can predict the packet network latency for all practical situations. The simulation results provide evidence that communication latency calculated using the real time analysis approach is safe, closely matching the figures obtained from simulation.

[1]  William J. Dally Virtual-channel flow control , 1990, ISCA '90.

[2]  Leandro Soares Indrusiak,et al.  Applying UML Interactions and Actor-Oriented Simulation to the Design Space Exploration of Network-on-Chip Interconnects , 2008, 2008 IEEE Computer Society Annual Symposium on VLSI.

[3]  Alan Burns,et al.  Applying new scheduling theory to static priority pre-emptive scheduling , 1993, Softw. Eng. J..

[4]  Füsun Özgüner,et al.  A Priority-Driven Flow Control Mechanism for Real-Time Traffic in Multiprocessor Networks , 1998, IEEE Trans. Parallel Distributed Syst..

[5]  M. W. Mutka,et al.  Using rate monotonic scheduling technology for real-time communications in a wormhole network , 1994, Second Workshop on Parallel and Distributed Real-Time Systems.

[6]  Debashis Saha,et al.  Recent Advances in Broadband Integrated Network Operations and Services Management , 2011 .

[7]  Lionel M. Ni,et al.  A survey of wormhole routing techniques in direct networks , 1993, Computer.

[8]  Füsun Özgüner,et al.  Feasibility test for real-time communication using wormhole routing , 1997 .

[9]  Askin Erdem Gundogdu,et al.  Sweeping Effect on Witricity , 2012, Int. J. Interdiscip. Telecommun. Netw..

[10]  Luca Benini,et al.  Networks on Chips : A New SoC Paradigm , 2022 .

[11]  Jong Kim,et al.  A real-time communication method for wormhole switching networks , 1998, Proceedings. 1998 International Conference on Parallel Processing (Cat. No.98EX205).

[12]  Chung Laung Liu,et al.  Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment , 1989, JACM.

[13]  John P. Lehoczky,et al.  Fixed priority scheduling of periodic task sets with arbitrary deadlines , 1990, [1990] Proceedings 11th Real-Time Systems Symposium.

[14]  William J. Dally,et al.  Route packets, not wires: on-chip inteconnection networks , 2001, DAC '01.

[15]  Parag C. Pendharkar Optimal Allocation of Multimedia Servers in the 3G Wireless Networks , 2008, Int. J. Bus. Data Commun. Netw..

[16]  Gerardus Johannes Maria Smit,et al.  A Survey of Efficient On-Chip Communications for SoC , 2003 .

[17]  Kees Goossens,et al.  AEthereal network on chip: concepts, architectures, and implementations , 2005, IEEE Design & Test of Computers.

[18]  Leandro Soares Indrusiak,et al.  Validation of executable application models mapped onto network-on-chip platforms , 2008, 2008 International Symposium on Industrial Embedded Systems.

[19]  T. Bjerregaard,et al.  Virtual channel designs for guaranteeing bandwidth in asynchronous network-on-chip , 2004, Proceedings Norchip Conference, 2004..

[20]  Samir Chatterjee,et al.  International Journal of Business Data Communications and Networking , 2010 .

[21]  Kaiqi Xiong,et al.  Secure Resource Optimization in Distributed Service Computing , 2009 .

[22]  Fernando Gehm Moraes,et al.  HERMES: an infrastructure for low area overhead packet-switching networks on chip , 2004, Integr..

[23]  Koen Bertels,et al.  Self-Adaptive Economic-Based Resource Allocation in Ad-Hoc Grids , 2012, Int. J. Embed. Real Time Commun. Syst..

[24]  Somprakash Bandyopadhyay,et al.  Testbed Implementation of a Pollution Monitoring System Using Wireless Sensor Network for the Protection of Public Spaces , 2009, Int. J. Bus. Data Commun. Netw..

[25]  Alan Burns,et al.  An extendible approach for analyzing fixed priority hard real-time tasks , 1994, Real-Time Systems.

[26]  Luca Benini,et al.  Powering networks on chips , 2001, International Symposium on System Synthesis (IEEE Cat. No.01EX526).

[27]  Jörg Henkel,et al.  On-chip networks: a scalable, communication-centric embedded system design paradigm , 2004, 17th International Conference on VLSI Design. Proceedings..

[28]  Kevin Curran,et al.  An Investigation into Factors Associated with Web Page Download Delay , 2005, Int. J. Bus. Data Commun. Netw..

[29]  Zhonghai Lu,et al.  Feasibility analysis of messages for on-chip networks using wormhole routing , 2005, Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005..

[30]  Sudhakar Yalamanchili,et al.  Interconnection Networks: An Engineering Approach , 2002 .

[31]  J. Bainbridge,et al.  Future Trends in SoC Interconnect , 2005, 2005 International Symposium on System-on-Chip.