Design of low-voltage low-power SC filters for high-frequency applications

In this communication an approach for designing low-voltage and low-power SC filters for high-frequency applications is presented. It is based on the use of single-ended double-sampling integrator cells based on low-voltage operational transconductance amplifiers which take advantage of a dynamic biasing and a clock booster. Following the proposed approach, a 6-MHz low-pass elliptic SC filter was designed in a 0.35-/spl mu/m CMOS process. The filter exhibits a 1.5-dB in-band ripple and a stopband attenuation of -35 dB while powered with 1.5-V power supply. The die size is 0.29 mm/sup 2/ while dissipating only 11 mW.

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