Separable implementation of the second order Volterra filter (SOVF) in Xilinx Virtex-E FPGA
暂无分享,去创建一个
[1] Iztok Kramberger. DSP acceleration using a reconfigurable FPGA , 1999, ISIE '99. Proceedings of the IEEE International Symposium on Industrial Electronics (Cat. No.99TH8465).
[2] Vaughn Betz,et al. Using Architectural "Families" to Increase FPGA Speed and Density , 1995, Third International ACM Symposium on Field-Programmable Gate Arrays.
[3] E.S. Ebbini,et al. Post-beamforming Volterra filters for contrast-assisted ultrasonic imaging: in-vivo results , 2003, IEEE Symposium on Ultrasonics, 2003.
[4] Frank Vahid,et al. A quantitative analysis of the speedup factors of FPGAs over processors , 2004, FPGA '04.
[5] E.S. Ebbini,et al. Post-beamforming second-order Volterra filter for pulse-echo ultrasonic imaging , 2003, IEEE Transactions on Ultrasonics, Ferroelectrics and Frequency Control.
[6] Keith D. Underwood,et al. FPGAs vs. CPUs: trends in peak floating-point performance , 2004, FPGA '04.