A numerical model for charge balance condition (CBC) on floating gate (FG) is presented, in which the Poisson’s equation is solved in the FG region with an extra equation for CBC, so that the accurate distributions of both potential and charge can be obtained. Then, a quasi-stationary scheme is developed to simulate the writing and erasing procedure of EEPROM cells. It may serve as a useful tool for accurate simulation of device with FG, such as EEPROM or EPROM. In this paper, we also present a numerical analysis for the single poly- Si layer Flotox EEPROM using PISCES with a new CBC model in order to understand physical relationships and bias dependencies for EEPROM characteristics. Threshold shifts show that a single set of tunnelling model parameters fit three different device conditions.
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