An ultra-low on-resistance power MOSFET fabricated by using a fully self-aligned process
暂无分享,去创建一个
[1] E. Fong,et al. Power DMOS for high-frequency and switching applications , 1980, IEEE Transactions on Electron Devices.
[2] J.D. Plummer,et al. Modeling of the on-resistance of LDMOS, VDMOS, and VMOS power transistors , 1980, IEEE Transactions on Electron Devices.
[3] M.S. Adler,et al. A large area power MOSFET designed for low conduction losses , 1981, 1981 International Electron Devices Meeting.
[4] A. Barker,et al. Anisotropic plasma etching of polysilicon using SF6 and CFCl3 , 1983 .
[5] D. Ueda,et al. A New Vertical Sidewall Channel Power MOSFET with Rectangular Grooves , 1984 .
[6] H. Takagi,et al. A new vertical power MOSFET structure with extremely reduced on-resistance , 1985, IEEE Transactions on Electron Devices.