High-rate quasi-cyclic LDPC codes for magnetic recording channel with low error floor
暂无分享,去创建一个
[1] Zongwang Li,et al. Efficient encoding of quasi-cyclic low-density parity-check codes , 2006, IEEE Trans. Commun..
[2] Dariush Divsalar,et al. Constructing LDPC codes from simple loop-free encoding modules , 2005, IEEE International Conference on Communications, 2005. ICC 2005. 2005.
[3] Tong Zhang,et al. Block-LDPC: a practical LDPC coding system design approach , 2005, IEEE Trans. Circuits Syst. I Regul. Pap..
[4] B. V. K. Vijaya Kumar,et al. Error floor investigation and girth optimization for certain types of low-density parity check codes , 2005, Proceedings. (ICASSP '05). IEEE International Conference on Acoustics, Speech, and Signal Processing, 2005..
[5] Andrew J. Viterbi,et al. An Intuitive Justification and a Simplified Implementation of the MAP Decoder for Convolutional Codes , 1998, IEEE J. Sel. Areas Commun..
[6] Ajay Dholakia,et al. Capacity-approaching codes: can they be applied to the magnetic recording channel? , 2004, IEEE Communications Magazine.
[7] Naresh R. Shanbhag,et al. Architecture-aware low-density parity-check codes , 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..
[8] Samuel Dolinar,et al. A scalable architecture of a structured LDPC decoder , 2004, International Symposium onInformation Theory, 2004. ISIT 2004. Proceedings..
[9] Dale E. Hocevar. LDPC code construction with flexible hardware implementation , 2003, IEEE International Conference on Communications, 2003. ICC '03..