一种低电压低功耗Rail-to-Rail CMOS运算放大器的设计

Based on 2μm CMOS technology, a low-voltage and low-power CMOS operational amplifier with Rail-to-Rail input and output range is designed. It acquires Rail-to-Rail common mode input range and constant transconductance by adopting a complementary input differential pairs which are controlled by current spill over circuit. A symmetric push-pull output stage which is based on class-AB acquires Rail-to-Rail output range. In order to get enough gain, the folded-cascode structure is used as intermediate amplifier stage and summing circuit. The whole circuit is simulated with a single 2.4v power supply. The simulation results indicate that the DC gain is 76.5dB while the phase margin is 67.6, and the unit-gain bandwidth 1.85 MHz.